CDC2351

ACTIVO

controlador de reloj de 1 línea a 10 líneas con salidas de 3 estados

Haga su pedido ahora

Hoja de datos

document-pdfAcrobat 1-Line To 10-Line Clock Driver With 3-State Outputs datasheet (Rev. D) (Inglés)

CDC2351

ACTIVO

Hoja de datos

Haga su pedido ahora

Detalles del producto

Function

Single-ended

Output frequency (max) (MHz)

100

Number of outputs

10

Output supply voltage (V)

3.3

Core supply voltage (V)

3.3

Output skew (ps)

500

Features

1:10 fanout

Operating temperature range (°C)

0 to 70

Rating

Catalog

Output type

LVTTL

Input type

LVTTL

Function

Single-ended

Output frequency (max) (MHz)

100

Number of outputs

10

Output supply voltage (V)

3.3

Core supply voltage (V)

3.3

Output skew (ps)

500

Features

1:10 fanout

Operating temperature range (°C)

0 to 70

Rating

Catalog

Output type

LVTTL

Input type

LVTTL

SOIC (DW)

24

159.65 mm² 15.5 x 10.3

SSOP (DB)

24

63.96 mm² 8.2 x 7.8

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
LVTTL-Compatible Inputs and Outputs
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Distributes One Clock Input to Ten Outputs
Outputs Have Internal Series Damping Resistor to Reduce Transmission Line Effects
Distributed V_CC and Ground Pins Reduce Switching Noise
State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages
Available in Q-Temp Automotive
High Reliability Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
EPIC-IIB is a trademark of Texas Instruments.

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
LVTTL-Compatible Inputs and Outputs
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Distributes One Clock Input to Ten Outputs
Outputs Have Internal Series Damping Resistor to Reduce Transmission Line Effects
Distributed V_CC and Ground Pins Reduce Switching Noise
State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages
Available in Q-Temp Automotive
High Reliability Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
EPIC-IIB is a trademark of Texas Instruments.

The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V V_CC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.

The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.

The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V V_CC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.

The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.

filter

Buscar otro/a Búferes de reloj

Descargar Ver vídeo con transcripción Video

Documentación técnica

star

=Principal documentación para este producto seleccionada por TI

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.

Ver todo 1

	Tipo	Título		Fecha
*	Data sheet	1-Line To 10-Line Clock Driver With 3-State Outputs datasheet (Rev. D)		02 oct 2000

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)

Solicitar

Encapsulado	Pines	Símbolos CAD, huellas y modelos 3D
SOIC (DW)	24	Ultra Librarian
SSOP (DB)	24	Ultra Librarian

Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

CDC2351

controlador de reloj de 1 línea a 10 líneas con salidas de 3 estados

CDC2351

Detalles del producto

Documentación técnica

Diseño y desarrollo

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

Pedidos y calidad

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Serie de videos

Videos