TMS320C6672

ACTIVO

DSP de punto fijo y flotante C66x de hasta 1.25 GHz, doble núcleo y alto rendimiento

Detalles del producto

DSP type 2 C66x DSP (max) (MHz) 1000, 1250, 1500 CPU 32-/64-bit Operating system DSP/BIOS Security Crypto accelerators Ethernet MAC 2-Port 1Gb switch PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (°C) -40 to 100
DSP type 2 C66x DSP (max) (MHz) 1000, 1250, 1500 CPU 32-/64-bit Operating system DSP/BIOS Security Crypto accelerators Ethernet MAC 2-Port 1Gb switch PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (°C) -40 to 100
FCBGA (CYP) 841 576 mm² 24 x 24
  • Two TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.25GHz
    • 80 GMAC/40 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 512KB L2 Per Core
    • 2 MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • 16-Bit EMIF - Async SRAM, NAND and NOR Flash Support
  • Two Telecom Serial Ports (TSIP) - 2/4/8 Lanes at 32.768/16.384/8.192
  • UART Interface
  • I2C Interface
  • 16 GPIO Pins
  • SPI Interface
  • Sixteen 64-Bit Timers
  • Three On-Chip PLLs
  • Two TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.25GHz
    • 80 GMAC/40 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 512KB L2 Per Core
    • 2 MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • 16-Bit EMIF - Async SRAM, NAND and NOR Flash Support
  • Two Telecom Serial Ports (TSIP) - 2/4/8 Lanes at 32.768/16.384/8.192
  • UART Interface
  • I2C Interface
  • 16 GPIO Pins
  • SPI Interface
  • Sixteen 64-Bit Timers
  • Three On-Chip PLLs

The TMS320C6672 Multicore Fixed and Floating Point Digital Signal Processor is based on TI's KeyStone multicore architecture. Integrated with two C66x CorePac DSPs, each core runs at 1.0 to 1.25 GHz enabling up to 2.5 GHz. The device supports high-performance signal processing applications such as mission critical, medical imaging, test, and automation. The C6672 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

The TMS320C6672 Multicore Fixed and Floating Point Digital Signal Processor is based on TI's KeyStone multicore architecture. Integrated with two C66x CorePac DSPs, each core runs at 1.0 to 1.25 GHz enabling up to 2.5 GHz. The device supports high-performance signal processing applications such as mission critical, medical imaging, test, and automation. The C6672 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TMS320C6672 Multicore Fixed and Floating-Point Digital Signal Processor datasheet (Rev. E) 07 may 2014
* Errata TMS320C6672 Fixed & Floating-Point DSP Silicon Errata (Revisions 1.0, 2.0) (Rev. H) 29 jun 2015
Application note DDR3 Design Requirements for KeyStone Devices (Rev. D) PDF | HTML 07 jul 2022
Application note Keystone Error Detection and Correction EDC ECC (Rev. A) 25 jun 2021
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML 19 may 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 jun 2020
Application note Using DSPLIB FFT Implementation for Real Input and Without Data Scaling PDF | HTML 11 jun 2019
Application note Keystone Bootloader Resources and FAQ 29 may 2019
Application note Keystone Multicore Device Family Schematic Checklist PDF | HTML 17 may 2019
Application note Hardware Design Guide for KeyStone Devices (Rev. D) 21 mar 2019
Application note KeyStone I DDR3 interface bring-up 06 mar 2019
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 ago 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) 26 jul 2017
Application note KeyStone I DDR3 Initialization (Rev. E) 28 oct 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices 13 abr 2016
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) 06 may 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) PDF | HTML 09 abr 2015
User guide DDR3 Memory Controller for KeyStone I Devices User's Guide (Rev. E) 20 ene 2015
Application note TI Keystone DSP Hyperlink SerDes IBIS-AMI Models 09 oct 2014
Application note TI Keystone DSP PCIe SerDes IBIS-AMI Models 09 oct 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) 04 sep 2014
User guide Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) 03 sep 2014
More literature KeyStone Lab Manual - Training 05 jun 2014
User guide System Analyzer User's Guide (Rev. F) 18 nov 2013
User guide PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) 30 sep 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) 15 jul 2013
White paper Another Look at the Future of Medical Processing 12 jul 2013
White paper Medical Software Development on Keystone Devices 12 jul 2013
White paper Accelerating high-performance computing development with Desktop Linux SDK 08 jul 2013
User guide Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) 03 jul 2013
User guide C66x CorePac User's Guide (Rev. C) 28 jun 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) 28 jun 2013
User guide HyperLink for KeyStone Devices User's Guide (Rev. C) 28 may 2013
User guide Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) 05 feb 2013
Product overview OpenMP Programming for TMS320C66x Multicore DSPs (Rev. A) 05 nov 2012
Application note SerDes Implementation Guidelines for KeyStone I Devices 31 oct 2012
Product overview TMS320C66x high-performance multicore DSPs for video surveillance 06 sep 2012
Application note Multicore Programming Guide (Rev. B) 29 ago 2012
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 21 ago 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 21 ago 2012
User guide Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) 11 jul 2012
White paper Leveraging multicore processors for machine vision applications 09 may 2012
User guide Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) 24 abr 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) 30 mar 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) 27 mar 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) 22 mar 2012
White paper Maximizing Multicore Efficiency with Navigator Runtime 23 feb 2012
Application note PCIe Use Cases for KeyStone Devices 13 dic 2011
User guide Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide (Rev. A) 15 oct 2011
Application note Introduction to TMS320C6000 DSP Optimization 06 oct 2011
User guide Debug and Trace for KeyStone I Devices User's Guide (Rev. A) 22 sep 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide 02 sep 2011
White paper KeyStone Multicore SoC Tool Suite: one platform for all needs 17 jun 2011
User guide External Memory Interface (EMIF16) for KeyStone Devices User's Guide (Rev. A) 24 may 2011
White paper Software and Hardware Design Challenges Due to Dynamic Raw NAND Market 19 may 2011
Product overview TMS320C6671/72/74/78 High-Performance Multicore Fixed- and Floating-Point DSPs (Rev. B) 25 abr 2011
Application note TMS320C66x DSP Generation of Devices (Rev. A) 25 abr 2011
White paper KeyStone Memory Architecture White Paper (Rev. A) 21 dic 2010
User guide C66x CPU and Instruction Set Reference Guide 09 nov 2010
User guide C66x DSP Cache User's Guide 09 nov 2010
Application note Clocking Design Guide for KeyStone Devices 09 nov 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide 09 nov 2010
Application note Optimizing Loops on the C66x DSP 09 nov 2010
User guide Telecom Serial Interface Port (TSIP) for KeyStone Devices User's Guide 09 nov 2010
User guide Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG 09 nov 2010
User guide Network Coprocessor for KeyStone Devices User's Guide 02 nov 2010

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

Z3-3P-VIDEO-EVMS — Módulos de evaluación Z3 de procesadores de video tecnológicos

Z3 develops and supports open-source software architectures focused on TI's DaVinci and AM57x processors. Products include multimedia centric framework, peripheral drivers, production modules and complete product design services. Z3 also provides system level design and integration for both wired (...)
Desde: Z3 Technology
Tarjeta secundaria

SHELD-3P-DSP-SOMS — Placas DSP-FPGA Sheldon

Sheldon Instruments designs and manufactures DSP based, COTS data acquisition and control hardware for PCIe/PCI, PCI104e/PCI104, XMC/PMC, and CompactPCI systems, along with drivers and real time development software for a variety of applications and markets.

Learn more about Sheldon Instruments at (...)
Sonda de depuración

TMDSEMU200-U — Sonda de depuración XDS200 USB

El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. El XDS200 presenta un equilibrio de bajo costo con buen rendimiento en comparación con el XDS110 de bajo costo y el XDS560v2 de alto rendimiento. Es compatible con una amplia (...)

Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Kit de desarrollo

TMDSEVM6678 — Módulos de evaluación TMS320C6678

TMS320C6678 Lite Evaluation Modules

The TMS320C6678 Lite Evaluation Modules (EVM), are easy-to-use, cost-efficient development tools that help developers quickly get started with designs using the C6678 or C6674 or C6672 multicore DSP. The EVMs include an on-board, single C6678 processor with robust (...)

Adaptador de interfaz

HL5CABLE — Cable de hipervínculo

A ½ meter long high speed cable to allow interfacing 2 EVMs via their high performance Hyperlink interfaces. EVMs supported are TMDSEVM6670L, TMDSEVM6678L, TMDSEVM6670LE, TMDSEVM6678LE, TMDSEVM6614LXE and TMDSEVM6618LXE.
Adaptador de interfaz

TMDXEVMPCI — Tarjeta adaptadora AMC a PCIe

This is a passive adapter card that allows select TI EVMs with a AMC header to be converted to a PCIe x4 lane edge connector so it can be inserted into a desktop PC or any where a PCIe header is utilized. The selected TI EVM must support native PCIe on the DSP. This card is a adapter and requires (...)
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-C667X — SDK de procesador para procesadores C667x: Compatibilidad con TI-RTOS

 

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Controlador o biblioteca

FFTLIB — Biblioteca FFT para dispositivos de punto flotante

The Texas Instruments FFT library is an optimized floating-point math function library for computing the discrete Fourier transform (DFT).
Controlador o biblioteca

MATHLIB — Biblioteca matemática DSP para dispositivos de punto flotante

The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Controlador o biblioteca

SPRC264 — TMS320C5000/6000 Biblioteca de imágenes (IMGLIB)

C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Guía del usuario: PDF
Controlador o biblioteca

SPRC265 — TMS320C6000 Biblioteca DSP (DSPLIB)

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Guía del usuario: PDF
Controlador o biblioteca

TELECOMLIB — Bibliotecas de telecomunicaciones y medios: FAXLIB, VoLIB y AEC/AER para procesadores TMS320C64x+ y

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
IDE, configuración, compilador o depurador

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

Productos y hardware compatibles

Productos y hardware compatibles

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Revise la página de detalles del producto para verificar la compatibilidad.

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IDE, configuración, compilador o depurador

SPNC016 TMS570 HET IDE v03.05.01

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Códec de software

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Modelo de simulación

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lock = Requiere aprobación de exportación (1 minuto)
Modelo de simulación

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SPRM575.ZIP (24 KB) - BSDL Model
Esquema

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Diseños de referencia

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Test report: PDF
Esquema: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
FCBGA (CYP) 841 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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