SN74AUP1T98

アクティブ

単一電源電圧レベル・シフタ

製品詳細

Technology family AUP1T Number of channels 1 Vout (min) (V) 2.3 Vout (max) (V) 3.6 Data rate (max) (Mbps) 200 IOH (max) (mA) -4 IOL (max) (mA) 4 Supply current (max) (µA) 0.9 Features Over-voltage tolerant inputs, Partial power down (Ioff), Single supply, Voltage translation Input type Schmitt-Trigger Output type Balanced CMOS, Push-Pull Operating temperature range (°C) -40 to 85
Technology family AUP1T Number of channels 1 Vout (min) (V) 2.3 Vout (max) (V) 3.6 Data rate (max) (Mbps) 200 IOH (max) (mA) -4 IOL (max) (mA) 4 Supply current (max) (µA) 0.9 Features Over-voltage tolerant inputs, Partial power down (Ioff), Single supply, Voltage translation Input type Schmitt-Trigger Output type Balanced CMOS, Push-Pull Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DSF) 6 1 mm² 1 x 1
  • Available in the Texas Instruments NanoStar™ Packages
  • Single-Supply Voltage Translator
  • 1.8 V to 3.3 V (at VCC = 3.3 V)
  • 2.5 V to 3.3 V (at VCC = 3.3 V)
  • 1.8 V to 2.5 V (at VCC = 2.5 V)
  • 3.3 V to 2.5 V (at VCC = 2.5 V)
  • Nine Configurable Gate Logic Functions
  • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity
  • Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 µA)
  • Very Low Static and Dynamic Power Consumption
  • Pb-Free Packages Available: SOT-23 (DBV), SC-70 (DCK), and WCSP (NanoStar)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Related Devices: SN74AUP1T97, SN74AUP1T57, and SN74AUP1T58

NanoStar is a trademark of Texas Instruments.

  • Available in the Texas Instruments NanoStar™ Packages
  • Single-Supply Voltage Translator
  • 1.8 V to 3.3 V (at VCC = 3.3 V)
  • 2.5 V to 3.3 V (at VCC = 3.3 V)
  • 1.8 V to 2.5 V (at VCC = 2.5 V)
  • 3.3 V to 2.5 V (at VCC = 2.5 V)
  • Nine Configurable Gate Logic Functions
  • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity
  • Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 µA)
  • Very Low Static and Dynamic Power Consumption
  • Pb-Free Packages Available: SOT-23 (DBV), SC-70 (DCK), and WCSP (NanoStar)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Related Devices: SN74AUP1T97, SN74AUP1T57, and SN74AUP1T58

NanoStar is a trademark of Texas Instruments.

AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T98 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply.

The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.

Schmitt-trigger inputs (VT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

The SN74AUP1T98 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.

Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.

The SN74AUP1T98 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.

NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.

AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T98 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply.

The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.

Schmitt-trigger inputs (VT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

The SN74AUP1T98 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.

Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.

The SN74AUP1T98 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.

NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート SN74AUP1T98 Single-Supply Voltage-Level Translator With 9 Gate Logic Functions データシート (Rev. I) 2013年 5月 23日
セレクション・ガイド Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
アプリケーション概要 Understanding Schmitt Triggers (Rev. A) PDF | HTML 2019年 5月 22日

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ユーザー ガイド: PDF
シミュレーション・モデル

SN74AUP1T98 IBIS Model

SCEM500.ZIP (23 KB) - IBIS Model
パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
SOT-23 (DBV) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 使用原材料
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブの拠点
  • 組み立てを実施した拠点

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