홈 데이터 컨버터 아날로그-디지털 컨버터(ADC) 고속 ADC(≥10 MSPS)
홈
데이터 컨버터
아날로그-디지털 컨버터(ADC)
고속 ADC(≥10 MSPS)

ADS5204-Q1

구형

오토모티브 애플리케이션용 인증을 받은 듀얼 채널, 10비트 40MSPS 아날로그-디지털 컨버터(ADC)

지금 주문
데이터 시트
ADS5204-Q1은(는) 더 이상 생산되지 않습니다.
이 제품은 더 이상 생산되지 않습니다. 새로운 설계는 대체 제품을 고려해야 합니다.
open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
ADC10040-Q1 활성 10비트, 40MSPS 아날로그-디지털 컨버터(ADC) - 차량용 인증 This product is an enhanced stereo codec with enhanced digital effects
ADC10DL065 활성 듀얼 채널 10비트 65MSPS 아날로그-디지털 컨버터(ADC) This product is an enhanced stereo codec with enhanced digital effects

ADS5204-Q1

구형
데이터 시트 지금 주문

제품 상세 정보

Sample rate (max) (Msps) 40 Resolution (Bits) 10 Number of input channels 2 Interface type Parallel CMOS, TTL Analog input BW (MHz) 300 Features Low Power Rating Automotive Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 275 Architecture Pipeline SNR (dB) 60.5 ENOB (Bits) 9.7 SFDR (dB) 75 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 40 Resolution (Bits) 10 Number of input channels 2 Interface type Parallel CMOS, TTL Analog input BW (MHz) 300 Features Low Power Rating Automotive Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 275 Architecture Pipeline SNR (dB) 60.5 ENOB (Bits) 9.7 SFDR (dB) 75 Operating temperature range (°C) -40 to 85 Input buffer Yes
TQFP (PFB) 48 81 mm² 9 x 9
  • Qualified for Automotive Applications
  • 3.3-V Single-Supply Operation
  • Dual Simultaneous Sample-and-Hold Inputs
  • Differential or Single-Ended Analog Inputs
  • Programmable Gain Amplifier: 0 dB to 18 dB
  • Separate Serial Control Interface
  • Single or Dual Parallel Bus Output
  • 60-dB SNR at fIN = 10.5 MHz
  • 73-dB SFDR at fIN = 10.5 MHz
  • Low Power: 275 mW
  • 300-MHz Analog Input Bandwidth
  • 3.3-V TTL/CMOS-Compatible Digital I/O
  • Internal or External Reference
  • Adjustable Reference Input Range
  • Power-Down (Standby) Mode
  • TQFP-48 Package
  • APPLICATIONS
    • Digital Communications (Baseband Sampling)
    • Portable Instrumentation
    • Video Processing
  • Qualified for Automotive Applications
  • 3.3-V Single-Supply Operation
  • Dual Simultaneous Sample-and-Hold Inputs
  • Differential or Single-Ended Analog Inputs
  • Programmable Gain Amplifier: 0 dB to 18 dB
  • Separate Serial Control Interface
  • Single or Dual Parallel Bus Output
  • 60-dB SNR at fIN = 10.5 MHz
  • 73-dB SFDR at fIN = 10.5 MHz
  • Low Power: 275 mW
  • 300-MHz Analog Input Bandwidth
  • 3.3-V TTL/CMOS-Compatible Digital I/O
  • Internal or External Reference
  • Adjustable Reference Input Range
  • Power-Down (Standby) Mode
  • TQFP-48 Package
  • APPLICATIONS
    • Digital Communications (Baseband Sampling)
    • Portable Instrumentation
    • Video Processing

The ADS5204 is a dual 10-bit, 40 MSPS analog-to-digital converter (ADC). It simultaneously converts each analog input signal into a 10-bit, binary coded digital word up to a maximum sampling rate of 40 MSPS per channel. All digital inputs and outputs are 3.3-V TTL/CMOS compatible.

An innovative dual pipeline architecture implemented in a CMOS process and the 3.3-V supply results in very low power dissipation. In order to provide maximum flexibility, both top and bottom voltage references can be set from user-supplied voltages. Alternatively, if no external references are available, the on-chip internal references can be used. Both ADCs share a common reference to improve offset and gain matching. If external reference voltage levels are available, the internal references can be powered down independently from the rest of the chip, resulting in even greater power savings.

The ADS5204 also features dual, onboard programmable gain amplifiers (PGAs) that allow a setting of 0 dB to 18 dB to adjust the gain of each set of inputs in order to match the amplitude of the incoming signal.

The ADS5204 is characterized for operation from –40°C to +85°C and is available in a TQFP-48 package.

The ADS5204 is a dual 10-bit, 40 MSPS analog-to-digital converter (ADC). It simultaneously converts each analog input signal into a 10-bit, binary coded digital word up to a maximum sampling rate of 40 MSPS per channel. All digital inputs and outputs are 3.3-V TTL/CMOS compatible.

An innovative dual pipeline architecture implemented in a CMOS process and the 3.3-V supply results in very low power dissipation. In order to provide maximum flexibility, both top and bottom voltage references can be set from user-supplied voltages. Alternatively, if no external references are available, the on-chip internal references can be used. Both ADCs share a common reference to improve offset and gain matching. If external reference voltage levels are available, the internal references can be powered down independently from the rest of the chip, resulting in even greater power savings.

The ADS5204 also features dual, onboard programmable gain amplifiers (PGAs) that allow a setting of 0 dB to 18 dB to adjust the gain of each set of inputs in order to match the amplitude of the incoming signal.

The ADS5204 is characterized for operation from –40°C to +85°C and is available in a TQFP-48 package.
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다운로드

기술 자료

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유형 직함 날짜
* Data sheet Dual 10-Bit 40-MSPS Low-Power ADC With PGA datasheet (Rev. A) 2008/06/23

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치