홈 로직 및 전압 변환 구성 가능 및 프로그래머블 로직 IC 멀티바이브레이터 원샷
홈
로직 및 전압 변환
구성 가능 및 프로그래머블 로직 IC
멀티바이브레이터 원샷

CD54HC123

활성

리셋을 지원하는 고속 CMOS 로직 듀얼 재트리거 가능 단안정 멀티바이브레이터

지금 주문
데이터 시트

CD54HC123

활성
데이터 시트 지금 주문

제품 상세 정보

Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Technology family HC Input type Standard CMOS Output type Push-Pull Supply current (µA) 160 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Retriggerable Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Technology family HC Input type Standard CMOS Output type Push-Pull Supply current (µA) 160 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Retriggerable Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
  • Overriding Reset Terminates Output Pulse
  • Triggering From the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on Both A\ and B Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH
  • Overriding Reset Terminates Output Pulse
  • Triggering From the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on Both A\ and B Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of Rx and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses.

Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A)\ and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B, and R\) must be terminated high or low.

The minimum value of external resistance, Rx is typically 5k. The minimum value external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.45 RXCX at VCC = 5V.

The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of Rx and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses.

Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A)\ and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B, and R\) must be terminated high or low.

The minimum value of external resistance, Rx is typically 5k. The minimum value external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.45 RXCX at VCC = 5V.
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기술 자료

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16개 모두 보기
유형 직함 날짜
* Data sheet CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 datasheet (Rev. F) 2003/10/13
* SMD CD54HC123 SMD 5962-86847 2016/06/21
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Application note Designing With the SN74LVC1G123 Monostable Multivibrator (Rev. A) PDF | HTML 2020/03/13
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996/05/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

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CDIP (J) 16 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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포럼 주제 모두 보기(영문)

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