DRV8351-SEP

활성

부트스트랩 다이오드를 내장한 방사선 내성 40V 단순 3상 게이트 드라이버

alarm알림 지금 주문

제품 상세 정보

Rating Space Architecture Gate driver Vs (min) (V) 5 Vs ABS (max) (V) 57.5 Operating temperature range (°C) -55 to 125
Rating Space Architecture Gate driver Vs (min) (V) 5 Vs ABS (max) (V) 57.5 Operating temperature range (°C) -55 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • 40V Three Phase Half-Bridge Gate driver
    • Drives N-Channel MOSFETs (NMOS)
    • Gate Driver Supply (GVDD): 5-15V
    • MOSFET supply (SHx) supports up to 40V
  • Target Radiation Performance
    • SEL, SEB, and SET immune up to LET = 43 MeV-cm2 /mg
    • SET and SEFI characterized up to LET = 43 MeV-cm2 /mg
    • TID assured for every wafer lot up to 30 krad(Si)
    • TID characterized up to 30 krad(Si)
  • Space-enhanced plastic (space EP):
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication site
    • Extended Product Life Cycle
    • Product Traceability
  • Integrated Bootstrap Diodes
  • Supports Inverting and Non-Inverting INLx inputs
  • Bootstrap gate drive architecture
    • 750mA source current
    • 1.5- sink current
  • Low leakage current on SHx pins (<55µA)
  • Absolute maximum BSTx voltage up to 57.5V
  • Supports negative transients up to -22V on SHx
  • Built-in cross conduction prevention
  • Fixed deadtime insertion of 200nS
  • Supports 3.3V and 5V logic inputs with 20V Abs max
  • 4nS typical propagation delay matching
  • Compact TSSOP package
  • Efficient system design with Power Blocks
  • Integrated protection features
    • BST undervoltage lockout (BSTUV)
    • GVDD undervoltage (GVDDUV)
  • 40V Three Phase Half-Bridge Gate driver
    • Drives N-Channel MOSFETs (NMOS)
    • Gate Driver Supply (GVDD): 5-15V
    • MOSFET supply (SHx) supports up to 40V
  • Target Radiation Performance
    • SEL, SEB, and SET immune up to LET = 43 MeV-cm2 /mg
    • SET and SEFI characterized up to LET = 43 MeV-cm2 /mg
    • TID assured for every wafer lot up to 30 krad(Si)
    • TID characterized up to 30 krad(Si)
  • Space-enhanced plastic (space EP):
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication site
    • Extended Product Life Cycle
    • Product Traceability
  • Integrated Bootstrap Diodes
  • Supports Inverting and Non-Inverting INLx inputs
  • Bootstrap gate drive architecture
    • 750mA source current
    • 1.5- sink current
  • Low leakage current on SHx pins (<55µA)
  • Absolute maximum BSTx voltage up to 57.5V
  • Supports negative transients up to -22V on SHx
  • Built-in cross conduction prevention
  • Fixed deadtime insertion of 200nS
  • Supports 3.3V and 5V logic inputs with 20V Abs max
  • 4nS typical propagation delay matching
  • Compact TSSOP package
  • Efficient system design with Power Blocks
  • Integrated protection features
    • BST undervoltage lockout (BSTUV)
    • GVDD undervoltage (GVDDUV)

DRV8351-SEP is a three phase half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8351-SEPD generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the high-side MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents.

The phase pins SHx are able to tolerate significant negative voltage transients; while high side gate driver supply BSTx and GHx can support higher positive voltage transients (57.5V) abs max voltage which improve the robustness of the system. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high sides through GVDD and BST undervoltage lockout.

DRV8351-SEP is a three phase half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8351-SEPD generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the high-side MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents.

The phase pins SHx are able to tolerate significant negative voltage transients; while high side gate driver supply BSTx and GHx can support higher positive voltage transients (57.5V) abs max voltage which improve the robustness of the system. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high sides through GVDD and BST undervoltage lockout.

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기술 자료

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4개 모두 보기
유형 직함 날짜
* Data sheet DRV8351-SEP: 40-V Three-Phase BLDC Gate Driver datasheet PDF | HTML 2024/12/09
* Radiation & reliability report DRV8351-SEP Single-Event Effects (SEE) Report PDF | HTML 2025/01/22
* Radiation & reliability report DRV8351-SEP Production Flow and Reliability Report PDF | HTML 2025/01/21
* Radiation & reliability report DRV8351-SEP Total Ionizing Dose (TID) Report PDF | HTML 2024/12/12

설계 및 개발

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평가 보드

DRV8351EVM — DRV8351 평가 모듈

DRV8351-SEP 평가 모듈(EVM)은 BLDC 모터용 DRV8351-SEP 게이트 드라이버를 기반으로 하는 30A, 3상 브러시리스 DC 드라이브 단계입니다. DRV8351-SEP은 외부 다이오드 없이 부트스트랩 작동을 위한 3개의 다이오드를 통합합니다. EVM에는 저압측 전류 측정을 위한 3개의 전류 션트 증폭기와 PVDD/GVDD 전압 및 보드 온도에 대한 피드백이 포함되어 있습니다. 최대 40V를 EVM에 공급할 수 있으며 온보드 벅은 부트스트랩 GVDD 공급에 필요한 12V를 생성합니다. 사용자 피드백을 위해 모든 (...)
사용 설명서: PDF | HTML
패키지 CAD 기호, 풋프린트 및 3D 모델
TSSOP (PW) 20 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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