SN54F374
- Eight D-Type Flip-Flops in a Single Package
- 3-State Bus-Driving True Outputs
- Full Parallel Access for Loading
- Buffered Control Inputs
- Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the ´F374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output enable () input can be used to place the eight outputs in either
a normal logic state (high or low) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and the increased drive
provide the capability to drive bus lines without need for interface
or pullup components.
The output enable ()
input does not affect internal operations of the flip-flop. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
The SN74F374 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F374 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F374 is characterized for operation from 0°C to 70°C.
관심 가지실만한 유사 제품
비교 대상 장치와 유사한 기능
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. A) | 1993/10/01 | |
* | SMD | SN54F374 SMD 5962-97590 | 2016/06/21 | |
Application note | Power-Up Behavior of Clocked Devices (Rev. B) | PDF | HTML | 2022/12/15 | |
Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
Application note | Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) | 1997/08/01 | ||
Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996/10/01 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
CDIP (J) | 20 | Ultra Librarian |
CFP (W) | 20 | Ultra Librarian |
LCCC (FK) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치