SN74AHC1G02-EP

활성

EP(Enhanced Product) 싱글 2입력 2V~5.5V NOR 게이트

제품 상세 정보

Technology family AHC Number of channels 1 Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Inputs per channel 2 IOL (max) (mA) 50 IOH (max) (mA) -50 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family AHC Number of channels 1 Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Inputs per channel 2 IOL (max) (mA) 50 IOH (max) (mA) -50 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Low Power Consumption, 10 µA Max ICC
  • ±8 mA Output Drive at 5 V
  • Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Low Power Consumption, 10 µA Max ICC
  • ±8 mA Output Drive at 5 V
  • Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

This device contains a single 2-input NOR gate that performs the Boolean function Y = AB or Y = A + B in positive logic.

This device contains a single 2-input NOR gate that performs the Boolean function Y = AB or Y = A + B in positive logic.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
SN74LVC1G02-EP 활성 향상된 제품 단일 2입력, 1.65V~5.5V NOR 게이트 Voltage range (1.65V to 5.5V), average drive strength (24mA), average propagation delay (5.5ns)

기술 자료

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21개 모두 보기
유형 직함 날짜
* Data sheet Single 2-Input Positive-NOR Gate datasheet 2008/02/20
* VID SN74AHC1G02-EP VID V6208611 2016/06/21
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note How to Select Little Logic (Rev. A) 2016/07/26
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004/11/04
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 2002/12/02
Application note Texas Instruments Little Logic Application Report 2002/11/01
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 2000/02/24
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 1999/09/08
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 1998/04/01
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 1997/12/01
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Live Insertion 1996/10/01

설계 및 개발

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패키지 CAD 기호, 풋프린트 및 3D 모델
SOT-SC70 (DCK) 5 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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