홈 로직 및 전압 변환 로직 게이트 AND 게이트
홈
로직 및 전압 변환
로직 게이트
AND 게이트

SN74AUP1G08-Q1

활성

오토모티브, 1채널, 2입력, 0.8V~3.6V 저전력(< 1uA) AND 게이트

지금 주문하기
데이터 시트

SN74AUP1G08-Q1

활성
데이터 시트 지금 주문하기

제품 상세 정보

Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption:
    ICC = 0.9 µA Max
  • Low Dynamic-Power Consumption:
    Cpd = 4.3 pF Typ at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typ
  • Low Noise: Overshoot and Undershoot
    < 10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better
    Switching Noise Immunity at the Input (Vhys = 250 mV, Typ at
    3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V Input/Output (I/O) Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD-78, Class II

NanoStar is a trademark of Texas Instruments.
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption:
    ICC = 0.9 µA Max
  • Low Dynamic-Power Consumption:
    Cpd = 4.3 pF Typ at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typ
  • Low Noise: Overshoot and Undershoot
    < 10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better
    Switching Noise Immunity at the Input (Vhys = 250 mV, Typ at
    3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V Input/Output (I/O) Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD-78, Class II

NanoStar is a trademark of Texas Instruments.

The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y = A\ + B\ in positive logic.

NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y = A\ + B\ in positive logic.

NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
6개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet LOW-POWER SINGLE 2-INPUT POSITIVE AND GATE datasheet 2012/12/12
Selection guide Logic Guide (Rev. AC) PDF | HTML 2025/11/13
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Application note How to Select Little Logic (Rev. A) 2016/07/26
More literature Automotive Logic Devices Brochure 2014/08/27
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈

5~8핀 수의 DCK, DCT, DCU, DRL 또는 DBV 패키지가 있는 모든 디바이스를 지원하도록 설계된 유연한 EVM.
사용 설명서: PDF
TI.com에서 구매할 수 없음
시뮬레이션 모델

SN74AUP1G08 Behavioral SPICE Model

SCEM690.ZIP (7 KB) - PSpice Model
다운로드
시뮬레이션 모델

SN74AUP1G08 IBIS Model (Rev. A)

SCEM405A.ZIP (65 KB) - IBIS Model
다운로드
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
SOT-SC70 (DCK) 5 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

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