홈 로직 및 전압 변환 전압 변환기 및 레벨 시프터 고정 방향 전압 변환기
홈
로직 및 전압 변환
전압 변환기 및 레벨 시프터
고정 방향 전압 변환기

SN74AVC4T234

활성

구성 전압 변환을 지원하는 4비트 듀얼 공급 버스 트랜시버

지금 주문
데이터 시트

SN74AVC4T234

활성
데이터 시트 지금 주문

제품 상세 정보

Technology family AVC Applications JTAG Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.9 High input voltage (max) (V) 3.6 Vout (min) (V) 0 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 3.6 Features 2.8 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AVC Applications JTAG Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.9 High input voltage (max) (V) 3.6 Vout (min) (V) 0 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 3.6 Features 2.8 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (ZWA) 11 2.8 mm² 2 x 1.4
  • Wide operating VCC range of 0.9 V to 3.6 V
  • 3.6-V I/O Tolerant to support mixed-mode signal operation
  • Max tpd of 3.7 ns at 3.3 V
  • Balanced propagation delays: tPLH = tPHL
  • Low static-power consumption, 5-µA Max ICC
  • Outputs disabled if either VCC goes to 0V
  • ±3-mA Output drive at 1.8 V
  • 26-Ω series resistor on A-side outputs
  • Ioff supports partial power-down-mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at input
  • Maximum data rates
    • 380 Mbps (1.8-V to 3.3-V translation)
    • 200 Mbps (<1.8-V to 3.3-V translation)
    • 200 Mbps (translate to 2.5 V or 1.8 V)
    • 150 Mbps (translate to 1.5 V)
    • 100 Mbps (translate to 1.2 V)
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 500-V charged-device model (C101)
  • Wide operating VCC range of 0.9 V to 3.6 V
  • 3.6-V I/O Tolerant to support mixed-mode signal operation
  • Max tpd of 3.7 ns at 3.3 V
  • Balanced propagation delays: tPLH = tPHL
  • Low static-power consumption, 5-µA Max ICC
  • Outputs disabled if either VCC goes to 0V
  • ±3-mA Output drive at 1.8 V
  • 26-Ω series resistor on A-side outputs
  • Ioff supports partial power-down-mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at input
  • Maximum data rates
    • 380 Mbps (1.8-V to 3.3-V translation)
    • 200 Mbps (<1.8-V to 3.3-V translation)
    • 200 Mbps (translate to 2.5 V or 1.8 V)
    • 150 Mbps (translate to 1.5 V)
    • 100 Mbps (translate to 1.2 V)
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 500-V charged-device model (C101)

This 4-bit non-inverting bus transceiver uses two separate configurable power-supply rails to enable asynchronous communication between B-port inputs and A-port outputs. The A port is designed to track VCCA while the B port is designed to track VCCB. Both VCCA and VCCB are configurable from 0.9 V to 3.6 V.

The SN74AVC4T234 solution offers the industry’s low-power needs in battery-powered portable applications by ensuring both a very low static and dynamic power consumption across the entire VCC range of 0.9 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then A-side ports are in the high-impedance state.

This 4-bit non-inverting bus transceiver uses two separate configurable power-supply rails to enable asynchronous communication between B-port inputs and A-port outputs. The A port is designed to track VCCA while the B port is designed to track VCCB. Both VCCA and VCCB are configurable from 0.9 V to 3.6 V.

The SN74AVC4T234 solution offers the industry’s low-power needs in battery-powered portable applications by ensuring both a very low static and dynamic power consumption across the entire VCC range of 0.9 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then A-side ports are in the high-impedance state.
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관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
TXU0104 활성 4채널 단방향 레벨 시프터 Similar product with a higher voltage operating range

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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18개 모두 보기
유형 직함 날짜
* Data sheet SN74AVC4T234 4-Bit Dual-Supply Bus Transceiver With Config Voltage Translation datasheet (Rev. B) 2020/07/01
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024/10/02
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/07/12
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/07/03
Selection guide Voltage Translation Buying Guide (Rev. A) 2021/04/15
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
More literature Voltage-Level Translation Guide (Rev. H) 2015/08/31
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 2015/04/30
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
More literature LCD Module Interface Application Clip 2003/05/09
User guide AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) 2002/08/20
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002/06/13
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002/05/22
Application note Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) 1999/07/07
Application note AVC Logic Family Technology and Applications (Rev. A) 1998/08/26

설계 및 개발

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시뮬레이션 모델

SN74AVC4T234 IBIS MODEL

SCEM541.ZIP (64 KB) - IBIS Model
다운로드
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NFBGA (ZWA) 11 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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