홈 로직 및 전압 변환 전압 변환기 및 레벨 시프터 애플리케이션별 전압 변환기
홈
로직 및 전압 변환
전압 변환기 및 레벨 시프터
애플리케이션별 전압 변환기

SN74FB1650

활성

18비트 TTL/BTL 범용 스토리지 트랜시버

지금 주문
데이터 시트

SN74FB1650

활성
데이터 시트 지금 주문

제품 상세 정보

Technology family FB Applications GTL Rating Catalog Operating temperature range (°C) 0 to 70
Technology family FB Applications GTL Rating Catalog Operating temperature range (°C) 0 to 70
HLQFP (PCA) 100 256 mm² 16 x 16
  • Compatible With IEEE Std 1194.1-1991 (BTL)
  • TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
  • Open-Collector B\-Port Outputs Sink 100 mA
  • BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
  • High-Impedance State During Power Up and Power Down
  • B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
  • TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination
  • Compatible With IEEE Std 1194.1-1991 (BTL)
  • TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
  • Open-Collector B\-Port Outputs Sink 100 mA
  • BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
  • High-Impedance State During Power Up and Power Down
  • B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
  • TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination

The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.

The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.

The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.

BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.

BG VCC and BG GND are the supply inputs for the bias generator.

The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.

The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.

The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.

BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.

BG VCC and BG GND are the supply inputs for the bias generator.
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기술 자료

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15개 모두 보기
유형 직함 날짜
* Data sheet SN74FB1650 datasheet (Rev. O) 2004/03/10
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/07/12
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/07/03
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Voltage Translation Buying Guide (Rev. A) 2021/04/15
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 2002/05/10
Selection guide Advanced Bus Interface Logic Selection Guide 2001/01/09
Application note GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A) 1997/03/01
Application note Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C) 1997/03/01
Application note Understanding Advanced Bus-Interface Products Design Guide 1996/05/01

설계 및 개발

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시뮬레이션 모델

SN74FB1650 IBIS Model (Rev. B)

SCBM009B.ZIP (11 KB) - IBIS Model
다운로드
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
HLQFP (PCA) 100 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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