SN74HCT377

Name: SN74HCT377
Brand: TI
SKU: SN74HCT377
Price: 0.161 USD

활성

클록 활성화를 지원하는 8진 D형 플립플롭

지금 주문

데이터 시트

document-pdfAcrobat SN54HCT377, SN74HCT377 datasheet (Rev. D) (영어)

SN74HCT377

활성

데이터 시트

지금 주문

제품 상세 정보

Number of channels

8

Technology family

HCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

35

IOL (max) (mA)

4

IOH (max) (mA)

-4

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Number of channels

8

Technology family

HCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

35

IOL (max) (mA)

4

IOH (max) (mA)

-4

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-40 to 85

Rating

Catalog

PDIP (N)

20

228.702 mm² 24.33 x 9.4

SOIC (DW)

20

131.84 mm² 12.8 x 10.3

Operating Voltage Range of 4.5 V to 5.5 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-&miccro;A Max I_CC
Typical t_pd = 12 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Contain Eight Flip-Flops With Single-Rail Outputs
Clock Enable Latched to Avoid False Clocking
Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators

Operating Voltage Range of 4.5 V to 5.5 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-&miccro;A Max I_CC
Typical t_pd = 12 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Contain Eight Flip-Flops With Single-Rail Outputs
Clock Enable Latched to Avoid False Clocking
Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators

These devices are positive-edge-triggered D-type flip-flops. The ’HCT377 devices are similar to the ’'HCT273 devices, but feature a latched clock-enable (CLKEN)\ input instead of a common clear.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse if CLKEN\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. These devices are designed to prevent false clocking by transitions at CLKEN\.

These devices are positive-edge-triggered D-type flip-flops. The ’HCT377 devices are similar to the ’'HCT273 devices, but feature a latched clock-enable (CLKEN)\ input instead of a common clear.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse if CLKEN\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. These devices are designed to prevent false clocking by transitions at CLKEN\.

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