SN74LV123A

Name: SN74LV123A
Brand: TI
SKU: SN74LV123A
Price: 0.182 USD

활성

듀얼 재트리거 가능 단안정 멀티바이브레이터

지금 주문

데이터 시트

document-pdfAcrobat SNx4LV123A Dual Retriggerable Monostable Multivibrators With Schmitt-Trigger Inputs datasheet (Rev. Q) (영어) PDF | HTML

SN74LV123A

활성

데이터 시트

지금 주문

제품 상세 정보

Number of channels

2

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Technology family

LV-A

Input type

Schmitt-Trigger

Output type

Push-Pull

Supply current (µA)

20

IOL (max) (mA)

12

IOH (max) (mA)

-12

Features

Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff), Retriggerable

Operating temperature range (°C)

-40 to 125

Rating

Catalog

Number of channels

2

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Technology family

LV-A

Input type

Schmitt-Trigger

Output type

Push-Pull

Supply current (µA)

20

IOL (max) (mA)

12

IOH (max) (mA)

-12

Features

Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff), Retriggerable

Operating temperature range (°C)

-40 to 125

Rating

Catalog

SOIC (D)

16

59.4 mm² 9.9 x 6

SOP (NS)

16

79.56 mm² 10.2 x 7.8

SSOP (DB)

16

48.36 mm² 6.2 x 7.8

TSSOP (PW)

16

32 mm² 5 x 6.4

TVSOP (DGV)

16

23.04 mm² 3.6 x 6.4

VQFN (RGY)

16

14 mm² 4 x 3.5

2-V to 5.5-V V_CC Operation
Maximum t_pd of 11 ns at 5 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on
All Ports
Schmitt-Trigger Circuitry on A, B, and CLR Inputs
for Slow Input Transition Rates
Edge Triggered From Active-High or
Active-Low Gated Logic Inputs
I_off Supports Partial-Power-Down Mode Operation
Retriggerable for Very Long Output Pulses,
up to 100% Duty Cycle
Overriding Clear Terminates Output Pulse
Glitch-Free Power-Up Reset on Outputs
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class 11
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

2-V to 5.5-V V_CC Operation
Maximum t_pd of 11 ns at 5 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on
All Ports
Schmitt-Trigger Circuitry on A, B, and CLR Inputs
for Slow Input Transition Rates
Edge Triggered From Active-High or
Active-Low Gated Logic Inputs
I_off Supports Partial-Power-Down Mode Operation
Retriggerable for Very Long Output Pulses,
up to 100% Duty Cycle
Overriding Clear Terminates Output Pulse
Glitch-Free Power-Up Reset on Outputs
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class 11
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

The ’LV123A devices are dual retriggerable monostable multivibrators designed for 2-V to 5.5-V V_CC operation.

These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.

The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between C_ext and R_ext/C_ext (positive) and an external resistor connected between R_ext/C_ext and V_CC. To obtain variable pulse durations, connect an external variable resistance between R_ext/C_ext and V_CC. The output pulse duration also can be reduced by taking CLR low.

The ’LV123A devices are dual retriggerable monostable multivibrators designed for 2-V to 5.5-V V_CC operation.

These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.

The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between C_ext and R_ext/C_ext (positive) and an external resistor connected between R_ext/C_ext and V_CC. To obtain variable pulse durations, connect an external variable resistance between R_ext/C_ext and V_CC. The output pulse duration also can be reduced by taking CLR low.

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기술 자료

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5개 모두 보기

	유형	직함		날짜
*	Data sheet	SNx4LV123A Dual Retriggerable Monostable Multivibrators With Schmitt-Trigger Inputs datasheet (Rev. Q)	PDF \| HTML	2015/08/31
	Product overview	Configurable Timed Reset Using Discrete Logic (Rev. A)	PDF \| HTML	2023/05/02
	Application note	Detect and Reset an Unresponsive Controller	PDF \| HTML	2023/03/21
	Application note	Designing With the SN74LVC1G123 Monostable Multivibrator (Rev. A)	PDF \| HTML	2020/03/13
	Selection guide	Logic Guide (Rev. AB)		2017/06/12

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML

TI.com에서 구매 불가

평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

사용 설명서: PDF | HTML

TI.com에서 구매 불가

시뮬레이션 모델

HSPICE Model for SN74LV123A

SCLJ019.ZIP (111 KB) - HSpice Model

다운로드

시뮬레이션 모델

SN74LV123A IBIS Model (Rev. A)

SCEM125A.ZIP (21 KB) - IBIS Model

다운로드

시뮬레이션 모델

SN74LV123A PSpice Model (Rev. C)

SCEM569C.ZIP (384 KB) - PSpice Model

다운로드

패키지	핀	CAD 기호, 풋프린트 및 3D 모델
SOIC (D)	16	Ultra Librarian
SOP (NS)	16	Ultra Librarian
SSOP (DB)	16	Ultra Librarian
TSSOP (PW)	16	Ultra Librarian
TVSOP (DGV)	16	Ultra Librarian
VQFN (RGY)	16	Ultra Librarian

TI의 평가 항목에 대한 표준 약관이 적용됩니다.

SN74LV123A

듀얼 재트리거 가능 단안정 멀티바이브레이터

SN74LV123A

제품 상세 정보

기술 자료

설계 및 개발

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

HSPICE Model for SN74LV123A

SN74LV123A IBIS Model (Rev. A)

SN74LV123A PSpice Model (Rev. C)

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

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