제품 상세 정보

Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
PLCC (FN) 28 155.0025 mm² 12.45 x 12.45 SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • Power Dissipation...40 mW Max
  • Advanced LinEPIC™ Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and µP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 µs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

  • Power Dissipation...40 mW Max
  • Advanced LinEPIC™ Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and µP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 µs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

다운로드

관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
ADS8504 활성 병렬 인터페이스 2.5V 내부 레퍼런스를 지원하는 12비트 250kHz CMOS 아날로그-디지털 컨버터 Higher resolution (12 bit), higher sampling rate (250 kSPS)

기술 자료

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* Data sheet 10-Bit Analog-to-Digital Converters With Parallel Outputs datasheet (Rev. G) 2003/10/30

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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