제품 상세 정보

Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 5, 12, 16, 20, 36, 44 Power supply voltage - dual (V) +/-10, +/-15, +/-18, +/-22, +/-5 Protocols Analog Ron (typ) (Ω) 2.1 CON (typ) (pF) 12 ON-state leakage current (max) (µA) 0.15 Supply current (typ) (µA) 7 Bandwidth (MHz) 75 Operating temperature range (°C) -40 to 125 Features 1.8-V compatible control inputs, Break-before-make, Fail-safe logic, Integrated pulldown resistor on logic pin Input/output continuous current (max) (mA) 370 Rating Catalog Drain supply voltage (max) (V) 22 Supply voltage (max) (V) 44 Negative rail supply voltage (max) (V) -22
Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 5, 12, 16, 20, 36, 44 Power supply voltage - dual (V) +/-10, +/-15, +/-18, +/-22, +/-5 Protocols Analog Ron (typ) (Ω) 2.1 CON (typ) (pF) 12 ON-state leakage current (max) (µA) 0.15 Supply current (typ) (µA) 7 Bandwidth (MHz) 75 Operating temperature range (°C) -40 to 125 Features 1.8-V compatible control inputs, Break-before-make, Fail-safe logic, Integrated pulldown resistor on logic pin Input/output continuous current (max) (mA) 370 Rating Catalog Drain supply voltage (max) (V) 22 Supply voltage (max) (V) 44 Negative rail supply voltage (max) (V) -22
VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • Latch-up immune
  • Dual supply range: ±4.5 V to ±22 V
  • Single supply range: 4.5 V to 44 V
  • Low on-resistance: 2.1 Ω
  • –40°C to +125°C operating temperature
  • 1.8 V logic compatible
  • Integrated pull-down resistor on logic pins
  • Fail-safe logic
  • Rail-to-rail operation
  • Bidirectional operation
  • Latch-up immune
  • Dual supply range: ±4.5 V to ±22 V
  • Single supply range: 4.5 V to 44 V
  • Low on-resistance: 2.1 Ω
  • –40°C to +125°C operating temperature
  • 1.8 V logic compatible
  • Integrated pull-down resistor on logic pins
  • Fail-safe logic
  • Rail-to-rail operation
  • Bidirectional operation

The TMUX722x are complementary metal-oxide semiconductor (CMOS) switches with latch-up immunity in a dual channel, 1:1 (SPST) configuration. These devices work with a single supply (4.5 V to 44 V), dual supplies (±4.5 V to ±22 V), or asymmetric supplies (such as VDD = 12 V, VSS = –5 V). The TMUX722x supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from VSS to VDD.

The TMUX722x can be enabled or disabled by controlling the SEL pins, turning on signal path 1 (S1 to D1) or signal path 2 (S2 to D2). All logic control inputs support logic levels from 1.8 V to VDD, allowing for both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-safe logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. For more information, see .

The TMUX72xx family provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX72xx family of switches and multiplexers to be used in harsh environments.

The TMUX722x are complementary metal-oxide semiconductor (CMOS) switches with latch-up immunity in a dual channel, 1:1 (SPST) configuration. These devices work with a single supply (4.5 V to 44 V), dual supplies (±4.5 V to ±22 V), or asymmetric supplies (such as VDD = 12 V, VSS = –5 V). The TMUX722x supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from VSS to VDD.

The TMUX722x can be enabled or disabled by controlling the SEL pins, turning on signal path 1 (S1 to D1) or signal path 2 (S2 to D2). All logic control inputs support logic levels from 1.8 V to VDD, allowing for both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-safe logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. For more information, see .

The TMUX72xx family provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX72xx family of switches and multiplexers to be used in harsh environments.

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기술 자료

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2개 모두 보기
유형 직함 날짜
* Data sheet TMUX722x 44 V , Low-RON, 1:1 (SPST), 2-Channel Precision Switches with Latch-Up Immunity and 1.8-V Logic datasheet (Rev. B) PDF | HTML 2024/05/06
EVM User's guide TMUX10DGS Evaluation Module User's Guide PDF | HTML 2024/04/09

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TMUX-10DGS-EVM — TMUX 10-DGS 평가 모듈

TMUX-10DGS-EVM은 10핀 DGS 패키지의 성능을 평가하는 데 사용됩니다. 평가 모듈(EVM)에는 10핀 DGS 장치를 납땜할 수 있는 패드가 포함되어 있습니다. 또한 다양한 신호를 유연하게 테스트할 수 있도록 기내 테스트 포인트가 제공됩니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

TMUX7221 PSPICE Model

SCDM332.ZIP (11 KB) - PSpice Model
시뮬레이션 모델

TMUX7221 IBIS Model

SCDM323.ZIP (51 KB) - IBIS Model
패키지 CAD 기호, 풋프린트 및 3D 모델
VSSOP (DGS) 10 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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