TPD4E001

現行

具 1-nA 最大洩漏與 USB 2.0 VCC 針腳的四 1.5-pF、5.5-V、±8-kV ESD 防護二極體

產品詳細資料

Package name SOT-23, SOT-5X3, SOT-SC70, USON, WSON Peak pulse power (8/20 μs) (max) (W) 100 Vrwm (V) 5.5 Bi-/uni-directional Uni-Directional Number of channels 4 IO capacitance (typ) (pF) 1.5 IEC 61000-4-2 contact (±V) 8000 IEC 61000-4-5 (A) 5.5 Clamping voltage (V) 25 Interface type Ethernet, LVDS, USB 2.0 Breakdown voltage (min) (V) 11 IO leakage current (max) (nA) 1 Rating Catalog Operating temperature range (°C) -40 to 85
Package name SOT-23, SOT-5X3, SOT-SC70, USON, WSON Peak pulse power (8/20 μs) (max) (W) 100 Vrwm (V) 5.5 Bi-/uni-directional Uni-Directional Number of channels 4 IO capacitance (typ) (pF) 1.5 IEC 61000-4-2 contact (±V) 8000 IEC 61000-4-5 (A) 5.5 Clamping voltage (V) 25 Interface type Ethernet, LVDS, USB 2.0 Breakdown voltage (min) (V) 11 IO leakage current (max) (nA) 1 Rating Catalog Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 6 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 USON (DPK) 6 2.56 mm² 1.6 x 1.6 WSON (DRS) 6 9 mm² 3 x 3
  • IEC 61000-4-2 ESD Protection (Level 4)
    • ±8-kV Contact Discharge
    • ±15-kV Air-Gap Discharge
  • 5.5-A Peak Pulse Current (8/20-µs Pulse)
  • IO Capacitance: 1.5 pF (Typical)
  • Low Leakage Current: 1 nA (Maximum)
  • Low Supply Current: 1 nA
  • 0.9-V to 5.5-V Supply-Voltage Range
  • Space-Saving DRL, DBV, DCK, DPK, and DRS Package Options
  • Alternate 2, 3, 6-Channel options Available: TPD2E001, TPD3E001, TPD6E001
  • IEC 61000-4-2 ESD Protection (Level 4)
    • ±8-kV Contact Discharge
    • ±15-kV Air-Gap Discharge
  • 5.5-A Peak Pulse Current (8/20-µs Pulse)
  • IO Capacitance: 1.5 pF (Typical)
  • Low Leakage Current: 1 nA (Maximum)
  • Low Supply Current: 1 nA
  • 0.9-V to 5.5-V Supply-Voltage Range
  • Space-Saving DRL, DBV, DCK, DPK, and DRS Package Options
  • Alternate 2, 3, 6-Channel options Available: TPD2E001, TPD3E001, TPD6E001

The TPD4E001 is a four-channel Transient Voltage Suppressor (TVS) based Electrostatic Discharge (ESD) protection diode array. The TPD4E001 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). This device has a 1.5-pF IO capacitance per channel, making it ideal for use in high-speed data IO interfaces. The ultra low leakage current (< 1 nA maximum) is suitable for precision analog measurements in applications like glucose meters and heart rate monitors.

The TPD4E001 is available in DRL(SOT), DBV (SOT-23), DCK (SC-70), DRS (QFN), and DPK (PUSON) packages and is specified for –40°C to +85°C operation. See also the TPD4E1U06DCKR and TPD4E1U06DBVR which are p2p compatible with the TPD4E001DCKR and TPD4E001DBVR. These devices offer higher IEC protection, lower capacitance, lower clamping voltage, and eliminate the input capacitor requirement.

The TPD4E001 is a four-channel Transient Voltage Suppressor (TVS) based Electrostatic Discharge (ESD) protection diode array. The TPD4E001 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). This device has a 1.5-pF IO capacitance per channel, making it ideal for use in high-speed data IO interfaces. The ultra low leakage current (< 1 nA maximum) is suitable for precision analog measurements in applications like glucose meters and heart rate monitors.

The TPD4E001 is available in DRL(SOT), DBV (SOT-23), DCK (SC-70), DRS (QFN), and DPK (PUSON) packages and is specified for –40°C to +85°C operation. See also the TPD4E1U06DCKR and TPD4E1U06DBVR which are p2p compatible with the TPD4E001DCKR and TPD4E001DBVR. These devices offer higher IEC protection, lower capacitance, lower clamping voltage, and eliminate the input capacitor requirement.

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類型 標題 日期
* Data sheet TPD4E001 Low-Capacitance 4-Channel ESD-Protection for High-Speed Data Interfaces datasheet (Rev. O) PDF | HTML 2019年 7月 23日
User guide Reading and Understanding an ESD Protection Data Sheet (Rev. A) PDF | HTML 2023年 9月 19日
Selection guide System-Level ESD Protection Guide (Rev. D) 2022年 9月 7日
Application note ESD Packaging and Layout Guide (Rev. B) PDF | HTML 2022年 8月 18日
Analog Design Journal Design Considerations for System-Level ESD Circuit Protection 2012年 9月 25日

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 6 Ultra Librarian
SOT-5X3 (DRL) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DPK) 6 Ultra Librarian
WSON (DRS) 6 Ultra Librarian

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