計算工具
UCC27200
- Drives two N-channel MOSFETs in high-side and low-side configuration
- Negative voltage handling on HS (–5V)
- Maximum boot voltage of 120V
- Maximum VDD voltage of 20V
- On-chip 0.65V VF, 0.65Ω RD bootstrap diode
- 22ns propagation delay times
- 3A sink and 3A source output currents
- 8ns rise and 7ns fall time with 1000pF load
- 1ns delay matching
- Undervoltage lockout for high-side and low-side driver
- Specified from –40°C to 150°C
The UCC2720x family of high-frequency N-channel MOSFET drivers include a 120V bootstrap diode and high-side and low-side drivers with independent inputs for maximum control flexibility. This allows for N-channel MOSFET control in half-bridge, full-bridge, two-switch forward, and active clamp forward converters. The low-side and the high-side gate drivers are independently controlled and matched to 1ns between the turnon and turnoff of each other.
An on-chip bootstrap diode eliminates the external discrete diodes. Undervoltage lockout is provided for both the high-side and the low-side drivers forcing the outputs low if the drive voltage is below the specified threshold.
Two versions of the UCC2720x are offered. The UCC27200 has high noise immune CMOS input thresholds while the UCC27201 has TTL compatible thresholds.
技術文件
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檢視所有 6 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | UCC2720x 120V, 3A/3A Half-Bridge Driver with 8V UVLO datasheet (Rev. D) | PDF | HTML | 2024年 7月 18日 |
| Application note | Understanding and comparing peak current capability of gate drivers | PDF | HTML | 2021年 3月 30日 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020年 2月 28日 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020年 2月 28日 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
模擬型號
UCC27200 and UCC27200A TINA-TI Transient Reference Design
SLUM112.TSC (138 KB) - TINA-TI Reference Design
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HSOIC (DDA) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
| VSON (DRM) | 8 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。