UCC27282

現行

具 5-V UVLO、連鎖和啟用功能的 3-A、120-V 半橋式閘極驅動器

產品詳細資料

Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 5.5 Input supply voltage (max) (V) 16 Peak output current (A) 3 Operating temperature range (°C) -40 to 140 Undervoltage lockout (typ) (V) 5 Rating Catalog Propagation delay time (µs) 0.016 Rise time (ns) 12 Fall time (ns) 10 Iq (mA) 0.002 Input threshold TTL Channel input logic TTL Switch node voltage (V) -14 Features Enable, Interlock Driver configuration Dual inputs
Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 5.5 Input supply voltage (max) (V) 16 Peak output current (A) 3 Operating temperature range (°C) -40 to 140 Undervoltage lockout (typ) (V) 5 Rating Catalog Propagation delay time (µs) 0.016 Rise time (ns) 12 Fall time (ns) 10 Iq (mA) 0.002 Input threshold TTL Channel input logic TTL Switch node voltage (V) -14 Features Enable, Interlock Driver configuration Dual inputs
SOIC (D) 8 29.4 mm² 4.9 x 6 VSON (DRC) 10 9 mm² 3 x 3 VSON (DRM) 8 16 mm² 4 x 4
  • Drives two N-channel MOSFETs in high-side low-side configuration
  • 5-V typical under voltage lockout
  • Input interlock
  • Enable/disable functionality in DRC package
  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1.8-nF load
  • 1-ns typical delay matching
  • Absolute Maximum Negative Voltage Handling on Inputs (–5 V)
  • Absolute Maximum Negative Voltage Handling on HS (–14 V)
  • ±3-A peak output current
  • Absolute maximum boot voltage 120 V
  • Low current (7-µA) consumption when disabled
  • Integrated bootstrap diode
  • Specified from –40°C to 140°C junction temperature
  • Drives two N-channel MOSFETs in high-side low-side configuration
  • 5-V typical under voltage lockout
  • Input interlock
  • Enable/disable functionality in DRC package
  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1.8-nF load
  • 1-ns typical delay matching
  • Absolute Maximum Negative Voltage Handling on Inputs (–5 V)
  • Absolute Maximum Negative Voltage Handling on HS (–14 V)
  • ±3-A peak output current
  • Absolute maximum boot voltage 120 V
  • Low current (7-µA) consumption when disabled
  • Integrated bootstrap diode
  • Specified from –40°C to 140°C junction temperature

The UCC27282 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3-A peak source and sink current along with low pull-up and pull-down resistance allows the UCC27282 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27282 can be used in conjunction with both analog and digital controllers.

The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. Input interlock further improves robustness and system reliability in high noise applications. The enable and disable functionality provides additional system flexibility by reducing power consumption by the driver and responds to fault events within the system. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in many high frequency applications and improves system efficiency in certain operating modes. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27282 is offered in a small package enabling high density designs.

The UCC27282 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3-A peak source and sink current along with low pull-up and pull-down resistance allows the UCC27282 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27282 can be used in conjunction with both analog and digital controllers.

The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. Input interlock further improves robustness and system reliability in high noise applications. The enable and disable functionality provides additional system flexibility by reducing power consumption by the driver and responds to fault events within the system. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in many high frequency applications and improves system efficiency in certain operating modes. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27282 is offered in a small package enabling high density designs.

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類型 標題 日期
* Data sheet UCC27282 3-A 120-V Half-Bridge Driver with Cross Conduction Protection and Low Switching Losses datasheet (Rev. B) PDF | HTML 2021年 9月 10日
Application note Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML 2024年 3月 25日
Application note Challenges and Solutions for Half-Bridge Gate Drivers in Bidirectional DC-DC Converters PDF | HTML 2024年 1月 24日
Application note Understanding and comparing peak current capability of gate drivers PDF | HTML 2021年 3月 30日
More literature Troubleshooting gate drive circuits in automotive and industrial applications 2021年 3月 23日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
User guide UCC27282 Evaluation Module (Rev. A) 2020年 1月 6日
Technical article Improvements in solar power efficiency come from the smallest gate drivers PDF | HTML 2019年 4月 17日
Application note Maximizing DC/DC converter designs with UCC27282 2019年 1月 18日
Application note UCC27282 Improving motor drive system robustness 2019年 1月 11日

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開發板

UCC27282EVM-335 — UCC27282 120V、3A、5V UVLO 高壓側低壓側閘極驅動器評估模組

UCC27282EVM-335 is designed for evaluating UCC27282DRC, which is a 120V half bridge gate driver with high source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datasheet. The EVM can also be used as Driver IC component selection guide. The EVM can (...)
使用指南: PDF
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模擬型號

UCC27282 PSpice Transient Model

SNVMBN3.ZIP (32 KB) - PSpice Model
模擬型號

UCC27282 Unencrypted PSpice Transient

SLUM720.ZIP (5 KB) - PSpice Model
計算工具

SLURB12 UCC272xx Schematic Review Template

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產品
半橋式驅動器
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
參考設計

PMP41017 — 採用 GaN 和 C2000™ MCU 的 3kW 雙相交錯半橋 LLC 參考設計

此參考設計是使用 LMG3422 及 F280039C 裝置的 3-kW、雙相、交錯式半橋電感器-電感器-電容器 (LLC)。此設計可達到 98.1% 峰值效率與 313 W/in³ 功率密度,可做為常用備援電源供應器 (CRP) 伺服器電源供應器的輸出階段,可用於評估兩個並聯 LLC 階段的控制方法,例如交叉與電流平衡。
Test report: PDF
參考設計

TIDA-050022 — 用於 <100-VIN DC/DC 轉換器的功率級參考設計

This reference design implements a high frequency power stage design based on the UCC27282 120-V half-bridge MOSFET driver and CSD19531 100-V power MOSFETs. With efficient switches and flexible VGS operating range, this design can reduce overall gate drive and conduction losses to achieve (...)
Design guide: PDF
電路圖: PDF
參考設計

PMP4320A — 具有數位控制且適用於電信應用的 600W 半磚式 DC/DC 轉換器參考設計

The PMP4320A reference design is a single output DC-DC converter with standard half-brick dimensions and full digital control configuration based on the UCD3138.  It is capable of delivering 50A output current with an output voltage of 12V.  The converter provides high efficiency and good (...)
Test report: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
VSON (DRM) 8 Ultra Librarian

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