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The DS90LV804 is a four channel 800 Mbps LVDS buffer/repeater. In many large systems, signals are distributed across cables and signal integrity is highly dependent on the data rate, cable type, length, and the termination scheme.
In order to maximize signal integrity, the DS90LV804 features both an internal input and output (source) termination to eliminate these extra components from the board, and to also place the terminations as close as possible to receiver inputs and driver output. This is especially significant when driving longer cables.
The DS90LV804, available in the WQFN (Leadless Leadframe Package) package, minimizes the footprint, and improves system performance.
An output enable pin is provided, which allows the user to place the LVDS outputs and internal biasing generators in a TRI-STATE, low power mode.
The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. This function is especially useful for boosting signals over lossy cables or point-to-point backplane configurations.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater datasheet (Rev. L) | 16 May 2013 | |
| Application note | Signaling Rate vs. Distance for Differential Buffers | 26 Jan 2010 | ||
| White paper | Making the Most of Your LVDS - 5 Tips for Buffering Signal Integrity Headaches | 01 Aug 2001 | ||
| Application note | An Overview of LVDS Technology | 05 Oct 1998 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WQFN (RTV) | 32 | Ultra Librarian |
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
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