BUF602

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Hochgeschwindigkeits-Closed-Loop-Puffer mit großer Bandbreite, 1000MHz

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Datenblatt

document-pdfAcrobat High-Speed, Closed-Loop Buffer datasheet (Rev. B) (Englisch)

BUF602

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Architecture

Fixed Gain/Buffer

Number of channels

1

Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V)

2.8

Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V)

12.6

GBW (typ) (MHz)

1000

BW at Acl (MHz)

1000

Acl, min spec gain (V/V)

1

Slew rate (typ) (V/µs)

8000

Vn at flatband (typ) (nV√Hz)

4.8

Vn at 1 kHz (typ) (nV√Hz)

5.9

Iq per channel (typ) (mA)

5.8

Vos (offset voltage at 25°C) (max) (mV)

30

Rail-to-rail

No

Rating

Catalog

Operating temperature range (°C)

-45 to 85

Input bias current (max) (pA)

7000000

Offset drift (typ) (µV/°C)

125

Iout (typ) (mA)

60

2nd harmonic (dBc)

76

3rd harmonic (dBc)

98

Frequency of harmonic distortion measurement (MHz)

5

Architecture

Fixed Gain/Buffer

Number of channels

1

Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V)

2.8

Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V)

12.6

GBW (typ) (MHz)

1000

BW at Acl (MHz)

1000

Acl, min spec gain (V/V)

1

Slew rate (typ) (V/µs)

8000

Vn at flatband (typ) (nV√Hz)

4.8

Vn at 1 kHz (typ) (nV√Hz)

5.9

Iq per channel (typ) (mA)

5.8

Vos (offset voltage at 25°C) (max) (mV)

30

Rail-to-rail

No

Rating

Catalog

Operating temperature range (°C)

-45 to 85

Input bias current (max) (pA)

7000000

Offset drift (typ) (µV/°C)

125

Iout (typ) (mA)

60

2nd harmonic (dBc)

76

3rd harmonic (dBc)

98

Frequency of harmonic distortion measurement (MHz)

5

SOIC (D)

8

29.4 mm² 4.9 x 6

SOT-23 (DBV)

5

8.12 mm² 2.9 x 2.8

Wide Bandwidth: 1000MHz
High Slew Rate: 8000V/µs
Flexible Supply Range:
±1.4V to ±6.3V Dual Supplies
+2.8V to +12.6V Single Supply
Output Current: 60mA (continuous)
Peak Output Current: 350mA
Low Quiescent Current: 5.8mA
Standard Buffer Pinout
Optional Mid-Supply Reference Buffer
APPLICATIONS
- Low Impedance Reference Buffers
- Clock Distribution Circuits
- Video/Broadcast Equipment
- Communications Equipment
- High-Speed Data Acquisition
- Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.

Wide Bandwidth: 1000MHz
High Slew Rate: 8000V/µs
Flexible Supply Range:
±1.4V to ±6.3V Dual Supplies
+2.8V to +12.6V Single Supply
Output Current: 60mA (continuous)
Peak Output Current: 350mA
Low Quiescent Current: 5.8mA
Standard Buffer Pinout
Optional Mid-Supply Reference Buffer
APPLICATIONS
- Low Impedance Reference Buffers
- Clock Distribution Circuits
- Video/Broadcast Equipment
- Communications Equipment
- High-Speed Data Acquisition
- Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (V_REF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (V_REF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.

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Alle anzeigen 5

	Typ	Titel	Datum
*	Data sheet	High-Speed, Closed-Loop Buffer datasheet (Rev. B)	22 Mai 2008
	E-book	The Signal e-book: A compendium of blog posts on op amp design topics	28 Mär 2017
	User guide	DEM-BUF-SO-1A Demonstration Fixture (Rev. B)	12 Apr 2012
	User guide	DEM-BUF-SOT-1A User's Guide (Rev. A)	22 Apr 2011
	User guide	DEM-BUF-SO-1A Demonstration Fixture (Rev. A)	28 Mär 2010

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

DEM-BUF-SO-1A — DEM-BUF-SO-1A

The DEM-BUF-SO-1A demonstration fixture helps designers evaluate the operation and performance of TI's high speed, closed-loop buffers. This unpopulated PC board is compatible with products offered in the 8-lead SOIC (D) package.

For more information on this type of buffer (...)

Benutzerhandbuch: PDF

Nicht verfügbar auf TI.com

Evaluierungsplatine

DEM-BUF-SOT-1A — DEM-BUF-SOT-1A

Benutzerhandbuch: PDF

Nicht verfügbar auf TI.com

Simulationsmodell

BUF602 PSpice Model (Rev. B)

SBOJ002B.ZIP (39 KB) - PSpice Model

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Simulationsmodell

BUF602 TINA-TI Reference Design

SBOMA37.TSC (2972 KB) - TINA-TI Reference Design

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Simulationsmodell

BUF602 TINA-TI Spice Model

SBOMA38.ZIP (6 KB) - TINA-TI Spice Model

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Berechnungstool

ANALOG-ENGINEER-CALC — Rechner für Analogtechniker

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)

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Berechnungstool

VOLT-DIVIDER-CALC — Voltage divider calculation tool

The voltage divider calculation tool (VOLT-DIVIDER-CALC) quickly determines a set of resistors for a voltage divider. This KnowledgeBase JavaScript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. VOLT-DIVIDER-CALC can also be used to (...)

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Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)

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Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

Benutzerhandbuch: PDF

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Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
SOIC (D)	8	Ultra Librarian
SOT-23 (DBV)	5	Ultra Librarian

Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

BUF602

Hochgeschwindigkeits-Closed-Loop-Puffer mit großer Bandbreite, 1000MHz

BUF602

Produktdetails

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Technische Dokumentation

Design und Entwicklung

DEM-BUF-SO-1A — DEM-BUF-SO-1A

DEM-BUF-SOT-1A — DEM-BUF-SOT-1A

BUF602 PSpice Model (Rev. B)

BUF602 TINA-TI Reference Design

BUF602 TINA-TI Spice Model

ANALOG-ENGINEER-CALC — Rechner für Analogtechniker

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