CD54HC4017

Name: CD54HC4017
Brand: TI
SKU: CD54HC4017
Price: 15.14 USD

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Highspeed-CMOS-Logik-Dekadenzähler/Teiler mit 10 decodierten Ausgängen

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Datenblatt

document-pdfAcrobat Decade Counter/Divider With Ten Decoded Outputs datasheet (Englisch)

CD54HC4017

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Datenblatt

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Produktdetails

Function

Counter

Bits (#)

10

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-55 to 125

Rating

Military

Function

Counter

Bits (#)

10

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-55 to 125

Rating

Military

CDIP (J)

16

135.3552 mm² 19.56 x 6.92

2-V to 6-V Operation
Fully Static Operation
Buffered Inputs
Common Reset
Positive-Edge Clocking
Balanced Propagation Delay and Transition Times
High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5 V
Packaged in Ceramic (F) DIP Package and Also Available in Chip Form (H)

2-V to 6-V Operation
Fully Static Operation
Buffered Inputs
Common Reset
Positive-Edge Clocking
Balanced Propagation Delay and Transition Times
High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5 V
Packaged in Ceramic (F) DIP Package and Also Available in Chip Form (H)

The CD54HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each decoded output normally is low and sequentially goes high on the low-to-high transition of the clock (CP) input. Each output stays high for one clock period of the ten-clock-period cycle. The terminal count (TC) output transitions low to high after output ten (9) goes low, and can be used in conjunction with the clock enable (CE\) input to cascade several stages. CE\ disables counting when in the high state. The master reset (MR) input, when taken high, sets all the decoded outputs, except 0, to low.

The CD54HC4017 is characterized for operation over the full military temperature range of -55°C to 125°C.

The CD54HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each decoded output normally is low and sequentially goes high on the low-to-high transition of the clock (CP) input. Each output stays high for one clock period of the ten-clock-period cycle. The terminal count (TC) output transitions low to high after output ten (9) goes low, and can be used in conjunction with the clock enable (CE\) input to cascade several stages. CE\ disables counting when in the high state. The master reset (MR) input, when taken high, sets all the decoded outputs, except 0, to low.

The CD54HC4017 is characterized for operation over the full military temperature range of -55°C to 125°C.

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Alle anzeigen 15

	Typ	Titel	Datum
*	Data sheet	Decade Counter/Divider With Ten Decoded Outputs datasheet	19 Mär 1999
*	SMD	CD54HC4017 SMD 8601101EA	21 Jun 2016
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	26 Jul 2021
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	User guide	Signal Switch Data Book (Rev. A)	14 Nov 2003
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	29 Aug 2002
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	01 Jun 1997
	Application note	Designing With Logic (Rev. C)	01 Jun 1997
	Application note	Input and Output Characteristics of Digital Integrated Circuits	01 Okt 1996
	Application note	Live Insertion	01 Okt 1996
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions	01 Mai 1996
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc	01 Apr 1996

Design und Entwicklung

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Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
CDIP (J)	16	Ultra Librarian

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CD54HC4017

Highspeed-CMOS-Logik-Dekadenzähler/Teiler mit 10 decodierten Ausgängen

CD54HC4017

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