CY54FCT841T

Name: CY54FCT841T
Brand: TI
SKU: CY54FCT841T
Price: 22.918 USD

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Latches (Typ D), 10 Bit, Bus-Schnittstelle, mit Tri-State-Ausgängen

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Datenblatt

document-pdfAcrobat 10-Bit Latches With 3-State Outputs datasheet (Rev. A) (Englisch)

Produktdetails

Technology family

FCT

Operating temperature range (°C)

-55 to 125

Rating

Military

Technology family

FCT

Operating temperature range (°C)

-55 to 125

Rating

Military

CDIP (JT)

24

221.44 mm² 32 x 6.92

Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic
Reduced V_OH (Typically = 3.3 V) Versions of Equivalent FCT Functions
Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
I_off Supports Partial-Power-Down Mode Operation
Matched Rise and Fall Times
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and Output Logic Levels
High-Speed Parallel Latches
Buffered Common Latch-Enable Input
3-State Outputs
CY54FCT841T
- 32-mA Output Sink Current
- 12-mA Output Source Current
CY74FCT841T
- 64-mA Output Sink Current
- 32-mA Output Source Current

Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic
Reduced V_OH (Typically = 3.3 V) Versions of Equivalent FCT Functions
Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
I_off Supports Partial-Power-Down Mode Operation
Matched Rise and Fall Times
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and Output Logic Levels
High-Speed Parallel Latches
Buffered Common Latch-Enable Input
3-State Outputs
CY54FCT841T
- 32-mA Output Sink Current
- 12-mA Output Source Current
CY74FCT841T
- 64-mA Output Sink Current
- 32-mA Output Source Current

The \x92FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The \x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 function.

The \x92FCT841T devices\x92 high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The \x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 function.

The \x92FCT841T devices\x92 high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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CY54FCT841T

Latches (Typ D), 10 Bit, Bus-Schnittstelle, mit Tri-State-Ausgängen

CY54FCT841T

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