SN74AHCT74Q-Q1

Name: SN74AHCT74Q-Q1
Brand: TI
SKU: SN74AHCT74Q-Q1
Price: 0.161 USD

AKTIV

Zweifach-Flipflops (Typ D) mit positiver Flankensteuerung, Auto-Produktkatalog, Clear und Preset

Jetzt bestellen

Datenblatt

document-pdfAcrobat Dual Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset datasheet (Rev. B) (Englisch)

SN74AHCT74Q-Q1

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Number of channels

2

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

70

IOL (max) (mA)

8

IOH (max) (mA)

-8

Supply current (max) (µA)

20

Features

Balanced outputs, Very high speed (tpd 5-10ns)

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Number of channels

2

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

70

IOL (max) (mA)

8

IOH (max) (mA)

-8

Supply current (max) (µA)

20

Features

Balanced outputs, Very high speed (tpd 5-10ns)

Operating temperature range (°C)

-40 to 125

Rating

Automotive

SOIC (D)

14

51.9 mm² 8.65 x 6

TSSOP (PW)

14

32 mm² 5 x 6.4

Qualified for Automotive Applications
Inputs Are TTL-Voltage Compatible
EPIC™ (Enhanced-Performance Implanted CMOS) Process
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

EPIC is a trademark of Texas Instruments.

Qualified for Automotive Applications
Inputs Are TTL-Voltage Compatible
EPIC™ (Enhanced-Performance Implanted CMOS) Process
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

EPIC is a trademark of Texas Instruments.

The SN74AHCT74Q is a dual positive-edge-triggered D-type flip-flop.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

The SN74AHCT74Q is a dual positive-edge-triggered D-type flip-flop.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

filter

Andere D-Typ-Flipflops suchen

Herunterladen

Technische Dokumentation

star

=Von TI ausgewählte Top-Empfehlungen für dieses Produkt

Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.

Alle anzeigen 1

	Typ	Titel		Datum
*	Data sheet	Dual Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset datasheet (Rev. B)		24 Apr 2008

SN74AHCT74Q-Q1

Zweifach-Flipflops (Typ D) mit positiver Flankensteuerung, Auto-Produktkatalog, Clear und Preset

SN74AHCT74Q-Q1

Produktdetails

Ähnliche Produkte, die für Sie interessant sein könnten

Selbe Funktionalität wie der verglichene Baustein bei gleicher Anschlussbelegung

Technische Dokumentation

Bestellen & Qualität

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren