Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | Dual 4-Bit Decade And Binary Counters datasheet | 01 Mär 1988 | |
| Selection guide | Logic Guide (Rev. AB) | 12 Jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 Dez 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 Jan 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 Jul 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 Aug 2002 | ||
| Application note | Designing With Logic (Rev. C) | 01 Jun 1997 | ||
| Application note | Designing with the SN54/74LS123 (Rev. A) | 01 Mär 1997 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 01 Okt 1996 | ||
| Application note | Live Insertion | 01 Okt 1996 |
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| PDIP (N) | 14 | Ultra Librarian |
| SOIC (D) | 14 | Ultra Librarian |
| SOP (NS) | 14 | Ultra Librarian |
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