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DS34C86T

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Quad CMOS Differential Line Receiver

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Data sheet

DS34C86T

ACTIVE
Data sheet Order now

Product details

Number of receivers 4 Number of transmitters 0 Duplex Half Supply voltage (nom) (V) 5 Signaling rate (max) (Mbps) 30 IEC 61000-4-2 contact (±V) None Fault protection (V) -14 to 14 Common-mode range (V) -14 to 14 Number of nodes 32 Isolated No Supply current (max) (µA) 23000 Rating Catalog Operating temperature range (°C) -40 to 85
Number of receivers 4 Number of transmitters 0 Duplex Half Supply voltage (nom) (V) 5 Signaling rate (max) (Mbps) 30 IEC 61000-4-2 contact (±V) None Fault protection (V) -14 to 14 Common-mode range (V) -14 to 14 Number of nodes 32 Isolated No Supply current (max) (µA) 23000 Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6
  • CMOS Design for Low Power
  • ±0.2V Sensitivity Over the Input Common Mode Voltage Range
  • Typical Propagation Delays: 19 ns
  • Typical Input Hysteresis: 60 mV
  • Inputs Won't Load Line when VCC = 0V
  • Meets the Requirements of EIA Standard RS-422
  • TRI-STATE Outputs for System Bus Compatibility
  • Available in Surface Mount
  • Open Input Failsafe Feature, Output High for Open Input

All trademarks are the property of their respective owners.

  • CMOS Design for Low Power
  • ±0.2V Sensitivity Over the Input Common Mode Voltage Range
  • Typical Propagation Delays: 19 ns
  • Typical Input Hysteresis: 60 mV
  • Inputs Won't Load Line when VCC = 0V
  • Meets the Requirements of EIA Standard RS-422
  • TRI-STATE Outputs for System Bus Compatibility
  • Available in Surface Mount
  • Open Input Failsafe Feature, Output High for Open Input

All trademarks are the property of their respective owners.

The DS34C86T is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.

The DS34C86T has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. Hysteresis is provided to improve noise margin and discourage output instability for slowly changing input waveforms.

The DS34C86T features internal pull-up and pull-down resistors which prevent output oscillation on unused channels.

Separate enable pins allow independent control of receiver pairs. The TRI-STATE outputs have 6 mA source and sink capability. The DS34C86T is pin compatible with the DS3486.

The DS34C86T is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.

The DS34C86T has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. Hysteresis is provided to improve noise margin and discourage output instability for slowly changing input waveforms.

The DS34C86T features internal pull-up and pull-down resistors which prevent output oscillation on unused channels.

Separate enable pins allow independent control of receiver pairs. The TRI-STATE outputs have 6 mA source and sink capability. The DS34C86T is pin compatible with the DS3486.
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* Data sheet DS34C86T Quad CMOS Differential Line Receiver datasheet (Rev. C) 15 Apr 2013
Application note AN-903 A Comparison of Differential Termination Techniques (Rev. B) 26 Apr 2013

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