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The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks.
The DS91D180/DS91C180 driver input accepts LVTTL/LVCMOS signals and converts them to differential M-LVDS signal levels. The DS91D180/DS91C180 receiver accepts low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and converts them to 3V LVCMOS signals. The DS91D180 device has a M-LVDS type 1 receiver input with no offset.The DS91C180 device has a type 2 receiver input which enable failsafe functionality.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair datasheet (Rev. M) | 18 Apr 2013 | |
| Application brief | How Far, How Fast Can You Operate MLVDS? | 06 Aug 2018 | ||
| Application note | Designing an ATCA Compliant M-LVDS Clock Distribution Network (Rev. B) | 26 Apr 2013 | ||
| Application note | Introduction to M-LVDS (TIA/EIA-899) (Rev. A) | 03 Jan 2013 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 14 | Ultra Librarian |
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