Información de empaque
| Encapsulado | Pines NFBGA (ZVB) | 176 |
| Rango de temperatura de funcionamiento (℃) -20 to 85 |
| Cant. de paquetes | Empresa de transporte 10 | BULK |
Características para DLPC300
- Required for Reliable Operation of the DLP3000
DMD - Multi-Mode, 24-Bit Input Port:
- Supports Parallel RGB With Pixel Clock Up to
33.5 MHz and 3 Input Color Bit-Depth Options:- 24-Bit RGB888 or 4:4:4 YCrCb888
- 18-Bit RGB666 or 4:4:4 YCrCb666
- 16-Bit RGB565 or 4:2:2 YCrCb565
- Supports 8-Bit BT.656 Bus Mode With Pixel
Clock Up to 33.5 MHz
- Supports Parallel RGB With Pixel Clock Up to
- Supports Input Resolutions 608 × 684, 864 × 480,
854 × 480 (WVGA), 640 × 480 (VGA), 320 × 240
(QVGA) - Pattern Input Mode
- One-to-One Mapping of Input Data to
Micromirrors - 1-Bit Binary Pattern Rates up to 4000-Hz
- 8-Bit Grayscale Pattern Rates up to 120-Hz
- One-to-One Mapping of Input Data to
- Video Input Mode with Pixel Data Processing
- Supports 1- to 60-Hz Frame Rates
- Programmable Degamma
- Spatial-Temporal Multiplexing (Dithering)
- Automatic Gain Control
- Color Space Conversion
- Output Trigger Signal for Synchronizing With
Camera, Sensor, or Other Peripherals - System Control:
- I2C Control of Device Configuration
- Programmable Current Control of up to 3 LEDs
- Integrated DMD Reset Driver Control
- DMD Horizontal and Vertical Display Image
Flip
- Low-Power Consumption: Less than 93 mW
(Typical) - External Memory Support:
- 166-MHz Mobile DDR SDRAM
- 33.3-MHz Serial FLASH
- 176-Pin, 7 × 7 mm With 0.4-mm Pitch NFBGA
Package
Descripción de DLPC300
The DLPC300 controller provides a convenient, multi-functional interface between user electronics and the DMD, enabling high-speed pattern rates (up to 4-kHz binary), providing LED control, and data formatting for multiple input resolutions. The DLPC300 digital controller, part of the DLP3000 chipset, is required for reliable operation of the DLP3000 DMD. The DLPC300 also outputs a trigger signal for synchronizing displayed patterns with a camera, sensor, or other peripherals.