Inicio Convertidores de datos Convertidores analógico-digitales (ADC) ADC de alta velocidad (≥ 10 MSPS)
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Convertidores de datos
Convertidores analógico-digitales (ADC)
ADC de alta velocidad (≥ 10 MSPS)

THS0842

ACTIVO

Convertidor analógico a digital (ADC) de dos canales, 8 bits y 40 MSPS

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THS0842

ACTIVO
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Detalles del producto

Sample rate (max) (Msps) 40 Resolution (Bits) 8 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1.3 Power consumption (typ) (mW) 320 Architecture Pipeline SNR (dB) 42.7 ENOB (bit) 6.9 SFDR (dB) 53 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 40 Resolution (Bits) 8 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1.3 Power consumption (typ) (mW) 320 Architecture Pipeline SNR (dB) 42.7 ENOB (bit) 6.9 SFDR (dB) 53 Operating temperature range (°C) -40 to 85 Input buffer No
TQFP (PFB) 48 81 mm² 9 x 9
  • Dual Simultaneous Sample and Hold Inputs
  • Differential or Single-Ended Analog Inputs
  • 8-Bit Resolution 40 MSPS Sampling Analog-to-Digital Converter (ADC)
  • Single or Dual Parallel Bus Output
  • Low Power Consumption: 275 mW Typ Using External References
  • Wide Analog Input Bandwidth: 600 MHz Typ
  • 3.3 V Single-Supply Operation
  • 3.3 V TTL/CMOS-Compatible Digital I/O
  • Internal or External Bottom and Top Reference Voltages
  • Adjustable Reference Input Range
  • Power-Down (Standby) Mode
  • 48-Pin Thin Quad Flat Pack (TQFP) Package
  • Applications
    • Digital Communications (Baseband Sampling)
    • Cable Modems
    • Set Top Boxes
    • Test Instruments
  • Dual Simultaneous Sample and Hold Inputs
  • Differential or Single-Ended Analog Inputs
  • 8-Bit Resolution 40 MSPS Sampling Analog-to-Digital Converter (ADC)
  • Single or Dual Parallel Bus Output
  • Low Power Consumption: 275 mW Typ Using External References
  • Wide Analog Input Bandwidth: 600 MHz Typ
  • 3.3 V Single-Supply Operation
  • 3.3 V TTL/CMOS-Compatible Digital I/O
  • Internal or External Bottom and Top Reference Voltages
  • Adjustable Reference Input Range
  • Power-Down (Standby) Mode
  • 48-Pin Thin Quad Flat Pack (TQFP) Package
  • Applications
    • Digital Communications (Baseband Sampling)
    • Cable Modems
    • Set Top Boxes
    • Test Instruments

The THS0842 is a dual 8-bit 40 MSPS high-speed A/D converter. It alternately converts each analog input signal into 8-bit binary-coded digital words up to a maximum sampling rate of 40 MSPS with an 80 MHz clock. All digital inputs and outputs are 3.3 V TTL/CMOS-compatible.

Thanks to an innovative single-pipeline architecture implemented in a CMOS process and the 3.3 V supply, the device consumes very little power. In order to provide maximum flexibility, both bottom and top voltage references can be set from user supplied voltages. Alternately, if no external references are available, on-chip references can be used which are also made available externally. The full-scale range is 1 Vpp, depending on the analog supply voltage. If external references are available, the internal references can be powered down independently from the rest of the chip, resulting in an even greater power saving.

The device is specifically suited for the baseband sampling of wireless local loop (WLL) communication, cable modems, set top boxes (STBs), and test instruments.

The THS0842 is a dual 8-bit 40 MSPS high-speed A/D converter. It alternately converts each analog input signal into 8-bit binary-coded digital words up to a maximum sampling rate of 40 MSPS with an 80 MHz clock. All digital inputs and outputs are 3.3 V TTL/CMOS-compatible.

Thanks to an innovative single-pipeline architecture implemented in a CMOS process and the 3.3 V supply, the device consumes very little power. In order to provide maximum flexibility, both bottom and top voltage references can be set from user supplied voltages. Alternately, if no external references are available, on-chip references can be used which are also made available externally. The full-scale range is 1 Vpp, depending on the analog supply voltage. If external references are available, the internal references can be powered down independently from the rest of the chip, resulting in an even greater power saving.

The device is specifically suited for the baseband sampling of wireless local loop (WLL) communication, cable modems, set top boxes (STBs), and test instruments.
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Documentación técnica

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Tipo Título Fecha
* Data sheet Dual-Input, 8-Bit, 40 MSPS, Low-Power ADC w/ Single or Dual Parallel Bus Output datasheet (Rev. A) 10 ago 2000
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 jun 2008
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 ene 2005
EVM User's guide THS0842 EVM User's Guide (Rev. C) 28 sep 2000

Diseño y desarrollo

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Pedidos y calidad

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  • Monitoreo continuo de confiabilidad
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