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Traductores de tensión de dirección automática

TXS0104E-Q1

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Conversor de nivel de tensión bidireccional de 4 bits para aplicaciones de drenaje abierto

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TXS0104E-Q1

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Detalles del producto

Technology family TXS Applications SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
Technology family TXS Applications SPIO Bits (#) 4 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 WQFN (BQA) 14 7.5 mm² 3 x 2.5
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • No direction-control signal required
  • Maximum data rates:
    • 24 Mbps maximum (push pull)
    • 2 Mbps (open drain)
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA  ≤ V CCB)
  • No power-supply sequencing required—V CCA or V CCB can be ramped first
  • ESD protection exceeds JESD 22:
    • A Port
      • 2000-V Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
    • B Port
      • 15-kV Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
  • IEC 61000-4-2 ESD (B port)
    • ±8-kV Contact Discharge
    • ±10-kV Air-Gap Discharge
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • No direction-control signal required
  • Maximum data rates:
    • 24 Mbps maximum (push pull)
    • 2 Mbps (open drain)
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA  ≤ V CCB)
  • No power-supply sequencing required—V CCA or V CCB can be ramped first
  • ESD protection exceeds JESD 22:
    • A Port
      • 2000-V Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
    • B Port
      • 15-kV Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
  • IEC 61000-4-2 ESD (B port)
    • ±8-kV Contact Discharge
    • ±10-kV Air-Gap Discharge

The TXS0104E-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track V CCA and V CCB respectively. The V CCB pin accepts any supply voltage from 2.3 V to 5.5 V while the V CCA pin accepts any supply voltage from 1.65 V to 3.6 V such that V CCA is less than or equal to V CCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E-Q1 device is designed so that the OE input circuit is supplied by V CCA.

To be in the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pull down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The TXS0104E-Q1 device connects an incompatible logic communication from chip-to-chip due to voltage mismatch. This auto-direction translator can be conveniently used to bridge the gap without the need of direction control from the host. Each channel can be mixed and matched with different output types (open-drain or push-pull) and mixed data flows (transmit or receive) without intervention from the host. This 4-bit noninverting translator uses two separate configurable power-supply rails. The A and B ports are designed to track V CCA and V CCB respectively. The V CCB pin accepts any supply voltage from 2.3 V to 5.5 V while the V CCA pin accepts any supply voltage from 1.65 V to 3.6 V such that V CCA is less than or equal to V CCB. This tracking allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E-Q1 device is designed so that the OE input circuit is supplied by V CCA.

To be in the high-impedance state during power up or power down, the OE pin must be tied to the GND pin through a pull down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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Documentación técnica

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* Data sheet TXS0104E-Q1 Automotive 4-Bit Bidirectional Voltage-Level Translatorfor Open-Drain and Push-Pull Applications datasheet (Rev. E) PDF | HTML 03 oct 2023
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 jul 2024
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 29 sep 2023
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 05 sep 2023
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 28 jun 2023
Selection guide Voltage Translation Buying Guide (Rev. A) 15 abr 2021
More literature Automotive Logic Devices Brochure 27 ago 2014

Diseño y desarrollo

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Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML
No disponible en TI.com
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
TSSOP (PW) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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