TPS73230-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –55° to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product–Change Notification
- Qualification Pedigree(1)
- Stable with No Output Capacitor or Any Value or Type of Capacitor
- Input Voltage Range: 1.7 V to 5.5 V
- Ultralow Dropout Voltage:
40 mV Typ at 250 mA - Excellent Load Transient Response—with or without Optional Output Capacitor
- New NMOS Topology Provides Low Reverse Leakage Current
- Low Noise: 30 µVRMS Typ (10 kHz to 100 kHz)
- 0.5% Initial Accuracy
- 1% Overall Accuracy (Line, Load, and Temperature)
- Less Than 1 µA Max IQ in Shutdown Mode
- Thermal Shutdown and Specified Min/Max Current Limit Protection
- Available in Multiple Output Voltage Versions
- Fixed Outputs of 1.2 V to 5 V
- Adjustable Outputs from 1.2 V to 5.5 V
- Custom Outputs Available
- APPLICATIONS
- Portable/Battery–Powered Equipment
- Post–Regulation for Switching Supplies
- Noise–Sensitive Circuitry such as VCOs
- Point of Load Regulation for DSPs, FPGAs, ASICs, and Microprocessors
(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
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The TPS732xx family of lowdropout (LDO) voltage regulators uses a new topology: an NMOS pass element in a voltagefollower configuration. This topology is stable using output capacitors with low ESR and even allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.
The TPS732xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1 µA and ideal for portable applications. The low output noise (30 µVRMS with 0.1 µF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.
技術資料
種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
---|---|---|---|---|---|---|
* | データシート | Cap-Free NMOS 250mA Lower Dropout Regulator With Reverse Current Protection データシート | 2006年 6月 16日 | |||
アプリケーション・ノート | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |||
アプリケーション・ノート | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 |
設計および開発
その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。
パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
---|---|---|
SOT-23 (DBV) | 5 | Ultra Librarian |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点