ホーム パワー・マネージメント AC/DC と DC/DC の各コントローラ (外部 FET)

8/7V UVLO 搭載、複数の代替出力、固定オフ時間、0℃ ~ 70℃、共振モード PWM

製品詳細

Operating temperature range (°C) 0 to 70 Control mode Voltage Topology Full bridge, Half bridge, Push pull Rating Catalog Features Error amplifier, Green mode, Light-load efficiency, Multi-topology, Soft start, Soft switching Duty cycle (max) (%) 50
Operating temperature range (°C) 0 to 70 Control mode Voltage Topology Full bridge, Half bridge, Push pull Rating Catalog Features Error amplifier, Green mode, Light-load efficiency, Multi-topology, Soft start, Soft switching Duty cycle (max) (%) 50
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Controls Zero Current Switched (ZCS) or Zero Voltage Switched (ZVS) Quasi-Resonant Converters
  • Zero-Crossing Terminated One-Shot Timer
  • Precision 1%, Soft-Started 5V Reference
  • Programmable Restart Delay Following Fault
  • Voltage-Controlled Oscillator (VCO) with Programmable Minimum and Maximum Frequencies from 10kHz to 1MHz
  • Low Start-Up Current (150µA typical)
  • Dual 1 Amp Peak FET Drivers
  • UVLO Option for Off-Line or DC/DC Applications
  • Controls Zero Current Switched (ZCS) or Zero Voltage Switched (ZVS) Quasi-Resonant Converters
  • Zero-Crossing Terminated One-Shot Timer
  • Precision 1%, Soft-Started 5V Reference
  • Programmable Restart Delay Following Fault
  • Voltage-Controlled Oscillator (VCO) with Programmable Minimum and Maximum Frequencies from 10kHz to 1MHz
  • Low Start-Up Current (150µA typical)
  • Dual 1 Amp Peak FET Drivers
  • UVLO Option for Off-Line or DC/DC Applications

The UC1861-1868 family of ICs is optimized for the control of Zero Current Switched and Zero Voltage Switched quasi-resonant converters. Differences between members of this device family result from the various combinations of UVLO thresholds and output options. Additionally, the one-shot pulse steering logic is configured to program either on-time for ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-1864).

The primary control blocks implemented include an error amplifier to compensate the overall system loop and to drive a voltage controlled oscillator (VCO), featuring programmable minimum and maximum frequencies. Triggered by the VCO, the one-shot generates pulses of a programmed maximum width, which can be modulated by the Zero Detection comparator. This circuit facilitates "true" zero current or voltage switching over various line, load, and temperature changes, and is also able to accommodate the resonant components' initial tolerances.

Under-Voltage Lockout is incorporated to facilitate safe starts upon power-up. The supply current during the under-voltage lockout period is typically less than 150µA, and the outputs are actively forced to the low state.

UVLO thresholds for the UC1861/62/65/66 are 16.5V (ON) and 10.5V (OFF), whereas the UC1863/64/67/68 thresholds are 8V (ON) and 7V (OFF). After VCC exceeds the UVLO threshold, a 5V generator is enabled which provides bias for the internal circuits and up to 10mA for external usage.

A Fault comparator serves to detect fault conditions and set a latch while forcing the output drivers low. The Soft-Ref pin serves three functions: providing soft start, restart delay, and the internal system reference.

Each device features dual 1 Amp peak totem pole output drivers for direct interface to power MOSFETS. The outputs are programmed to alternate in the UC1861/63/65/67 devices. The UC1862/64/66/68 outputs operate in unison alllowing a 2 Amp peak current.

The UC1861-1868 family of ICs is optimized for the control of Zero Current Switched and Zero Voltage Switched quasi-resonant converters. Differences between members of this device family result from the various combinations of UVLO thresholds and output options. Additionally, the one-shot pulse steering logic is configured to program either on-time for ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-1864).

The primary control blocks implemented include an error amplifier to compensate the overall system loop and to drive a voltage controlled oscillator (VCO), featuring programmable minimum and maximum frequencies. Triggered by the VCO, the one-shot generates pulses of a programmed maximum width, which can be modulated by the Zero Detection comparator. This circuit facilitates "true" zero current or voltage switching over various line, load, and temperature changes, and is also able to accommodate the resonant components' initial tolerances.

Under-Voltage Lockout is incorporated to facilitate safe starts upon power-up. The supply current during the under-voltage lockout period is typically less than 150µA, and the outputs are actively forced to the low state.

UVLO thresholds for the UC1861/62/65/66 are 16.5V (ON) and 10.5V (OFF), whereas the UC1863/64/67/68 thresholds are 8V (ON) and 7V (OFF). After VCC exceeds the UVLO threshold, a 5V generator is enabled which provides bias for the internal circuits and up to 10mA for external usage.

A Fault comparator serves to detect fault conditions and set a latch while forcing the output drivers low. The Soft-Ref pin serves three functions: providing soft start, restart delay, and the internal system reference.

Each device features dual 1 Amp peak totem pole output drivers for direct interface to power MOSFETS. The outputs are programmed to alternate in the UC1861/63/65/67 devices. The UC1862/64/66/68 outputs operate in unison alllowing a 2 Amp peak current.

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート Resonant-Mode Power Supply Controllers データシート (Rev. B) 2007年 9月 13日
アプリケーション・ノート U-122 A New Family of Integrated Circuits Controls Resonant Mode Power 1999年 9月 5日

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パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
PDIP (N) 16 Ultra Librarian
SOIC (DW) 16 Ultra Librarian

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 使用原材料
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブの拠点
  • 組み立てを実施した拠点

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