제품 상세 정보

Sample rate (max) (Msps) 160 Resolution (bps) 16 Number of input channels 2 Interface type DDR LVDS, Parallel LVDS Analog input BW (MHz) 1400 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2, 2.4 Power consumption (typ) (mW) 1340 Architecture Pipeline SNR (dB) 78 ENOB (bit) 12.3 SFDR (dB) 95 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 160 Resolution (bps) 16 Number of input channels 2 Interface type DDR LVDS, Parallel LVDS Analog input BW (MHz) 1400 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2, 2.4 Power consumption (typ) (mW) 1340 Architecture Pipeline SNR (dB) 78 ENOB (bit) 12.3 SFDR (dB) 95 Operating temperature range (°C) -40 to 85 Input buffer No
VQFNP (NKE) 68 100 mm² 10 x 10
  • Low Power Consumption
  • On-Chip Precision Reference and Sample-and-Hold Circuit
  • On-Chip Automatic Calibration During Power-Up
  • Dual Data Rate LVDS Output Port
  • Dual Supplies: 1.8V and 3.0V Operation
  • Selectable Input Range: 2.4 and 2.0 VPP
  • Sampling Edge Flipping with Clock Divider by 2 Option
  • Internal Clock Divide by 1 or 2
  • On-Chip Low Jitter Duty-Cycle Stabilizer
  • Power-Down and Sleep Modes
  • Output Fixed Pattern Generation
  • Output Clock Position Adjustment
  • 3-Wire SPI
  • Offset Binary or 2's Complement Data Format
  • 68-Pin VQFN Package (10x10x0.8, 0.5mm Pin-Pitch)

Key Specifications

  • Resolution: 16 Bits
  • Conversion Rate: 160 MSPS
  • SNR (@FIN = 30 MHz): 78 dBFS (typ)
  • SNR (@FIN = 197 MHz): 76 dBFS (typ)
  • SFDR (@FIN = 30 MHz): 95 dBFS (typ)
  • SFDR (@FIN = 197 MHz): 89 dBFS (typ)
  • Full Power Bandwidth: 1.4 GHz (typ)
  • Power Consumption:
    • Core per channel: 612 mW (typ)
    • LVDS Driver: 117 mW (typ)
    • Total: 1.3W (typ)
  • Operating Temperature Range (-40°C ~ 85°C)
  • Low Power Consumption
  • On-Chip Precision Reference and Sample-and-Hold Circuit
  • On-Chip Automatic Calibration During Power-Up
  • Dual Data Rate LVDS Output Port
  • Dual Supplies: 1.8V and 3.0V Operation
  • Selectable Input Range: 2.4 and 2.0 VPP
  • Sampling Edge Flipping with Clock Divider by 2 Option
  • Internal Clock Divide by 1 or 2
  • On-Chip Low Jitter Duty-Cycle Stabilizer
  • Power-Down and Sleep Modes
  • Output Fixed Pattern Generation
  • Output Clock Position Adjustment
  • 3-Wire SPI
  • Offset Binary or 2's Complement Data Format
  • 68-Pin VQFN Package (10x10x0.8, 0.5mm Pin-Pitch)

Key Specifications

  • Resolution: 16 Bits
  • Conversion Rate: 160 MSPS
  • SNR (@FIN = 30 MHz): 78 dBFS (typ)
  • SNR (@FIN = 197 MHz): 76 dBFS (typ)
  • SFDR (@FIN = 30 MHz): 95 dBFS (typ)
  • SFDR (@FIN = 197 MHz): 89 dBFS (typ)
  • Full Power Bandwidth: 1.4 GHz (typ)
  • Power Consumption:
    • Core per channel: 612 mW (typ)
    • LVDS Driver: 117 mW (typ)
    • Total: 1.3W (typ)
  • Operating Temperature Range (-40°C ~ 85°C)

The ADC16DV160 is a monolithic dual channel high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 160 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16DV160 can be re-calibrated at any time through the 3-wire Serial Peripheral Interface (SPI). An integrated low noise and stable voltage reference and differential reference buffer amplifier eases board level design. The on-chip duty cycle stabilizer with low additive jitter allows a wide range of input clock duty cycles without compromising dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The interface between the ADC16DV160 and a receiver block can be easily verified and optimized via fixed pattern generation and output clock position features. The digital data is provided via dual data rate LVDS outputs – making possible the 68-pin, 10 mm x 10 mm VQFN package. The ADC16DV160 operates on dual power supplies of +1.8V and +3.0V with a power-down feature to reduce power consumption to very low levels while allowing fast recovery to full operation.

The ADC16DV160 is a monolithic dual channel high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 160 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16DV160 can be re-calibrated at any time through the 3-wire Serial Peripheral Interface (SPI). An integrated low noise and stable voltage reference and differential reference buffer amplifier eases board level design. The on-chip duty cycle stabilizer with low additive jitter allows a wide range of input clock duty cycles without compromising dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The interface between the ADC16DV160 and a receiver block can be easily verified and optimized via fixed pattern generation and output clock position features. The digital data is provided via dual data rate LVDS outputs – making possible the 68-pin, 10 mm x 10 mm VQFN package. The ADC16DV160 operates on dual power supplies of +1.8V and +3.0V with a power-down feature to reduce power consumption to very low levels while allowing fast recovery to full operation.

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기술 자료

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10개 모두 보기
유형 직함 날짜
* Data sheet Dual Channel, 16-Bit, 160 MSPS Analog-to-Digital Converter with DDR LVDS Outputs datasheet (Rev. H) 2013/02/19
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015/05/22
Application note Signal Chain Noise Figure Analysis 2014/10/29
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013/07/19
EVM User's guide AN-1942 LMH6517 Evaluation Board (Rev. B) 2013/04/26
Application note AN-2177 Using the LMH6554 as a ADC Driver (Rev. A) 2013/04/26
Application note Between the Amplifier and ADC: Managing Filter Loss in Communications Systems (Rev. B) 2013/04/26
Application note Drivng HSpeed ADCs w/LMH6521 DVGA for High IF AC-Coupled Apps (Rev. A) 2013/04/26
User guide High-IF Sub-sampling Receiver Subsystem User Guide 2012/01/27
EVM User's guide ADC16DV160HFEB Evaluation Board User Guide 2012/01/25

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

ADC16DV160HFEB — ADC16DV160HFEB 평가 보드

This Design Kit is designed to ease evaluation and design-in of Texas Instruments' ADC16DV160 Dual Channel 16-bit Analog-to-Digital Converter with DDR LVDS outputs, which operates at speeds up 160 Msps.

The evaluation board can be used by connecting the board to the WaveVision 5.1 Data Capture Board (...)

사용 설명서: PDF
TI.com에서 구매 불가
지원 소프트웨어

WAVEVISION5 WaveVision 5 Software

WaveVision 5 software is part of the WaveVision evaluation system that also includes WaveVision 5 Data Capture Board. The WaveVision 5 system is an easy-to-use data acquisition and analysis tool, designed to help users evaluate Texas Instruments' Signal Path solutions.

While WaveVision 5 software (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
고속 ADC(≥10 MSPS)
ADC08D1020 8비트, 듀얼 1.0GSPS 또는 싱글 2.0GSPS 아날로그-디지털 컨버터(ADC) ADC08D1520 8비트, 듀얼 1.5GSPS 또는 싱글 3.0GSPS 아날로그-디지털 컨버터(ADC) ADC10D1000 10비트, 듀얼 1.0GSPS 또는 싱글 2.0GSPS 아날로그-디지털 컨버터(ADC) ADC10D1500 10비트, 듀얼 1.5GSPS 또는 싱글 3.0GSPS 아날로그-디지털 컨버터(ADC) ADC10DV200 듀얼 채널, 10비트, 200MSPS 아날로그-디지털 컨버터(ADC) ADC12D1000 12비트, 듀얼 1.0GSPS 또는 싱글 2.0GSPS 아날로그-디지털 컨버터(ADC) ADC12D1000RF 12비트, 듀얼 1.0GSPS 또는 싱글 2.0GSPS, RF 샘플링 아날로그-디지털 컨버터(ADC) ADC12D1600 12비트, 듀얼 1.6GSPS 또는 싱글 3.2GSPS 아날로그-디지털 컨버터(ADC) ADC12D1600RF 12비트, 듀얼 1.6GSPS 또는 싱글 3.2GSPS, RF 샘플링 아날로그-디지털 컨버터(ADC) ADC12D1800 12비트, 듀얼 1.8GSPS 또는 싱글 3.6GSPS 아날로그-디지털 컨버터(ADC) ADC12D1800RF 12비트, 듀얼 1.8GSPS 또는 싱글 3.6GSPS, RF 샘플링 아날로그-디지털 컨버터(ADC) ADC12D500RF 12비트, 듀얼 500MSPS 또는 싱글 1.0GSPS, RF 샘플링 아날로그-디지털 컨버터(ADC) ADC12D800RF 12비트, 듀얼 800MSPS 또는 싱글 1.6GSPS, RF 샘플링 아날로그-디지털 컨버터(ADC) ADC14DC080 듀얼 채널, 14비트, 80MSPS, 1.0GHz 입력 대역폭 아날로그-디지털 컨버터(ADC) ADC16DV160 듀얼 채널, 16비트, 160MSPS 아날로그-디지털 컨버터(ADC) ADC16V130 16비트, 130MSPS, 아날로그-디지털 컨버터(ADC)
하드웨어 개발
평가 보드
ADC12D1600RB 12비트, 듀얼 1.6/1.8GSPS 또는 싱글 3.2/3.6GSPS ADC 레퍼런스 보드 ADC16DV160HFEB ADC16DV160HFEB 평가 보드 LM98640CVAL 듀얼 채널, 14비트, 40MSPS 아날로그 프론트 엔드, LVDS 출력 포함 WAVEVSN-BRD-5.1 WaveVision 5 데이터 캡처 보드 버전 5.1
소프트웨어
애플리케이션 소프트웨어 및 프레임워크
WAVEVISION5 데이터 수집 및 분석 소프트웨어
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 CAD 기호, 풋프린트 및 3D 모델
VQFNP (NKE) 68 Ultra Librarian

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  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
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  • 팹 위치
  • 조립 위치

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