The DRV8328 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A sink. The DRV8328 can operate from a single power supply and supports a wide input supply range of 4.5 to 60 V.
The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3-V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.
A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.
The DRV8328 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A sink. The DRV8328 can operate from a single power supply and supports a wide input supply range of 4.5 to 60 V.
The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3-V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.
A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.