RES60A-Q1
- AEC-Q200 qualified for automotive applications:
- Temperature grade 1: –40°C to +125°C
- High voltage rating:
- Survives 3+ HiPOT tests at 4000VDC (60s)
- 1700VDC creepage and clearance support between HVIN and LVIN (IEC-61010 PD 2)
- High dc precision with low shift and drift:
- Initial ratio matching precision: ±0.1% (max)
-
Low drift: ±1ppm/°C (typ)
- Accurate ±0.2% across aging and temperature
- Low thermal noise (1kHz) thin-film resistors:
- 30nV/√Hz (210:1 ratio)
- 25nV/√Hz (310:1 ratio)
- 22nV/√Hz (410:1 ratio)
- 20nV/√Hz (500:1 ratio)
- 18nV/√Hz (610:1 ratio)
- 14nV/√Hz (1000:1 ratio)
The RES60A-Q1 is a matched resistive divider, implemented in thin-film SiCr with Texas Instruments modern, high-performance, analog wafer process. A high quality SiO2 insulative layer encapsulates the resistors and enables usage at extremely high voltages, up to 1400VDC for sustained operation or 4000VDC for HiPOT testing (60s). The device has a nominal input resistance of RHV = 12.5MΩ, and is available in several nominal ratios to meet a wide array of system needs.
The RES60A-Q1 series features high ratio matching precision, with the measured ratio of each divider within ±0.1% (max) of the nominal. This precision is maintained over the specified temperature range and aging, with a cumulative drift of only ±0.2% (max). Therefore, the lifetime tolerance of an uncalibrated RES60A-Q1 remains within a ±0.3% (max) envelope.
The RES60A-Q1 is automotive qualified under AEC-Q200 temperature grade 1, with a specified temperature range from –40°C to +125°C. The device is offered in an 8-pin SOIC package, with nominal body size 7.5mm × 5.85mm, and features creepage and clearance distances of at least 8.5mm between the high-voltage and low-voltage pins.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | RES60A-Q1 Automotive, 1400VDC , Precision Resistive Divider datasheet | PDF | HTML | 2024/09/10 |
Technical article | 통합 저항 분할기가 EV 배터리 시스템 성능을 개선하는 방법 | PDF | HTML | 2024/10/14 | |
Certificate | RES60EVM EU Declaration of Conformity (DoC) | 2024/09/10 | ||
EVM User's guide | RES60 Evaluation Module User's Guide | PDF | HTML | 2024/09/05 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOIC (DWV) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치