產品詳細資料

PGA/VGA PGA Number of channels 1 Digital interface Pin programmable Vs (max) (V) 36 Vs (min) (V) 8 Input type Differential BW at Acl (MHz) 10 Slew rate (typ) (V/µs) 35 Gain (max) (dB) 24 Rating Catalog Architecture Fully Differential ADC Driver Operating temperature range (°C) -40 to 125
PGA/VGA PGA Number of channels 1 Digital interface Pin programmable Vs (max) (V) 36 Vs (min) (V) 8 Input type Differential BW at Acl (MHz) 10 Slew rate (typ) (V/µs) 35 Gain (max) (dB) 24 Rating Catalog Architecture Fully Differential ADC Driver Operating temperature range (°C) -40 to 125
VQFN (RGT) 16 9 mm² 3 x 3
  • Eight pin-programmable binary gains
    • G (V/V) = ⅛, ¼, ½, 1, 2, 4, 8, and 16
  • Low gain error drift: 1 ppm/°C (max) at G = 1 V/V
  • Fully differential outputs
    • Independent output power-supply pins to allow for ADC input overdrive protection
    • Output common-mode control
  • Faster signal processing:
    • Wide bandwidth: 10 MHz at all gains
    • High slew rate: 35 V/µs
    • Settling time: 500 ns to 0.01%, 950 ns to 0.0015%
    • Input stage noise: 7.8 nV/√ Hz at G = 16 V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40 V beyond supplies
  • Input-stage supply range:
    • Single supply: 8 V to 36 V
    • Dual supply: ±4 V to ±18 V
  • Output-stage supply range:
    • Single supply: 4.5 V to 36 V
    • Dual supply: ±2.25 V to ±18 V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3-mm × 3-mm VQFN
  • Eight pin-programmable binary gains
    • G (V/V) = ⅛, ¼, ½, 1, 2, 4, 8, and 16
  • Low gain error drift: 1 ppm/°C (max) at G = 1 V/V
  • Fully differential outputs
    • Independent output power-supply pins to allow for ADC input overdrive protection
    • Output common-mode control
  • Faster signal processing:
    • Wide bandwidth: 10 MHz at all gains
    • High slew rate: 35 V/µs
    • Settling time: 500 ns to 0.01%, 950 ns to 0.0015%
    • Input stage noise: 7.8 nV/√ Hz at G = 16 V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40 V beyond supplies
  • Input-stage supply range:
    • Single supply: 8 V to 36 V
    • Dual supply: ±4 V to ±18 V
  • Output-stage supply range:
    • Single supply: 4.5 V to 36 V
    • Dual supply: ±2.25 V to ±18 V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3-mm × 3-mm VQFN

The PGA855 is a high-bandwidth programmable gain instrumentation amplifier with fully differential outputs. The PGA855 is equipped with eight binary gain settings, from an attenuating gain of 0.125 V/V to a maximum of 16 V/V, using three digital gain selection pins. The output common-mode voltage can be independently set using the VOCM pin.

The PGA855 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 1 MSPS without the need for an additional ADC driver. The output-stage power supplies (LVSS/LVDD) are decoupled from the input stage and can be connected to power supplies of the ADC to protect the ADC or downstream device against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3 pA/√ Hz, making the PGA855 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers excellent gain flatness, even at high frequencies, making the PGA855 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages up to ±40 V beyond the power-supply voltages.

The PGA855 is a high-bandwidth programmable gain instrumentation amplifier with fully differential outputs. The PGA855 is equipped with eight binary gain settings, from an attenuating gain of 0.125 V/V to a maximum of 16 V/V, using three digital gain selection pins. The output common-mode voltage can be independently set using the VOCM pin.

The PGA855 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 1 MSPS without the need for an additional ADC driver. The output-stage power supplies (LVSS/LVDD) are decoupled from the input stage and can be connected to power supplies of the ADC to protect the ADC or downstream device against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3 pA/√ Hz, making the PGA855 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers excellent gain flatness, even at high frequencies, making the PGA855 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages up to ±40 V beyond the power-supply voltages.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 5
類型 標題 日期
* Data sheet PGA855 Low-Noise, Wide-Bandwidth, Fully Differential Output Programmable-Gain Instrumentation Amplifier datasheet (Rev. B) PDF | HTML 2023年 9月 27日
Application note Achieve High SNR with the PGA855, Fully Differential Programmable-Gain Amplifier PDF | HTML 2024年 3月 21日
Product overview PGA855 and PGA849 Product Overview PDF | HTML 2024年 2月 21日
EVM User's guide PGA855 Evaluation Module User's Guide (Rev. A) PDF | HTML 2023年 9月 25日
Product overview PLC Analog Input Front-End Architectures PDF | HTML 2022年 7月 31日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

PGA855EVM — 適用於全差動輸出可編程增益儀器放大器的 PGA855 評估模組

PGA855 評估模組 (EVM) 是評估 PGA855 的開發平台,是具差動輸出的高精密可編程增益放大器。PGA855 最佳化後可驅動具全差動輸入的高性能類比轉數位轉換器 (ADC) 輸入。

使用指南: PDF | HTML
TI.com 無法提供
模擬型號

PGA855 PSpice Model

SBOMCF3.ZIP (1879 KB) - PSpice Model
模擬型號

PGA855 TINA-TI Reference Design

SBOMCF5.TSC (223 KB) - TINA-TI Reference Design
模擬型號

PGA855 TINA-TI Spice Model

SBOMCF4.ZIP (62 KB) - TINA-TI Spice Model
計算工具

PGA85X-INPUT-OUTPUT-RANGE-DESIGN-CALC PGA85x input and output range design calculator

PGA85X-INPUT-OUTPUT-RANGE-DESIGN-CALC
支援產品和硬體

支援產品和硬體

產品
可編程與可變增益放大器 (PGA 與 VGA)
PGA855 具有低雜訊、寬頻、全差動輸出可編程增益儀器放大器
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDA-010945 — 適用於數位萬用表的精密訊號鏈參考設計

此參考設計說明用於 DC 量測之高性能訊號鏈的理論、設計與測試。主要目標應用是數位萬用表 (DMM),但此設計也適用於其他應用,例如資料擷取 (DAQ) 和狀況監控。此設計使用高性能 24 位元類比轉數位轉換器 ADS127L21,以及低雜訊可編程增益放大器 PGA855,並具備 ±2.4ppm 的典型非線性與低溫度致漂移,進而實現高 DC 準確度。這些裝置皆高度整合,可簡化整體訊號鏈設計。
Design guide: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGT) 16 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片