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SN74HC02-EP

現行

Enhanced product 4-ch, 2-input, 2-V to 6-V NOR gate

立即訂購
產品規格表

SN74HC02-EP

現行
產品規格表 立即訂購

產品詳細資料

Technology family HC Number of channels 4 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Output type Push-Pull Input type Standard CMOS Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 28 Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 125
Technology family HC Number of channels 4 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Output type Push-Pull Input type Standard CMOS Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 28 Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of Up To –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 20-µA Max ICC
  • Typical tpd = 8 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of Up To –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 20-µA Max ICC
  • Typical tpd = 8 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74HC02 contains four independent 2-input NOR gates. It performs the Boolean function Y = (A + B)\ or Y = A\ • B\ in positive logic.

The SN74HC02 contains four independent 2-input NOR gates. It performs the Boolean function Y = (A + B)\ or Y = A\ • B\ in positive logic.
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類型 標題 日期
* Data sheet SN74HC02-EP datasheet (Rev. A) 2004年 1月 6日
* VID SN74HC02-EP VID V6204687 2016年 6月 21日
* Radiation & reliability report SN74HC02QPWREP Reliability Report 2013年 9月 5日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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