SN74LV132A

Name: SN74LV132A
Brand: TI
SKU: SN74LV132A
Price: 0.086 USD

現行

具有施密特觸發器輸入的 4 通道、4 輸入、2-V 至 5.5-V NAND 閘

立即訂購

產品規格表

document-pdfAcrobat SNx4LV132A Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs datasheet (Rev. J) (英文) PDF | HTML

SN74LV132A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LV-A

Supply voltage (min) (V)

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-12

Input type

Schmitt-Trigger

Output type

Push-Pull

Features

High speed (tpd 10- 50ns), Over-voltage tolerant inputs, Partial power down (Ioff)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LV-A

Supply voltage (min) (V)

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-12

Input type

Schmitt-Trigger

Output type

Push-Pull

Features

High speed (tpd 10- 50ns), Over-voltage tolerant inputs, Partial power down (Ioff)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

51.9 mm² 8.65 x 6

79.56 mm² 10.2 x 7.8

48.36 mm² 6.2 x 7.8

32 mm² 5 x 6.4

23.04 mm² 3.6 x 6.4

2-V to 5.5-V V_CC Operation
Max t_pd of 9 ns at 5 V
Typical V_OLP (Output Ground Bounce) <0.8 V at
V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2.3 V at
V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All
Ports
Latch-Up Performance Exceeds 250 mA per
JESD 17
I_off Supports Live Insertion, Partial Power-Down
Mode, and Back Drive Protection
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
APPLICATIONS
- Industrial PC: Rugged PC and Laptop
- Access Control and Security: Camera
  Surveillance IP Network
- Vending, Payment and Change Machines
- Patient Monitoring STB / DVR / Streaming Media
  (Withdraw)
- Other Motor Drives (Such as Switch Reluctance)

All other trademarks are the property of their respective owners

2-V to 5.5-V V_CC Operation
Max t_pd of 9 ns at 5 V
Typical V_OLP (Output Ground Bounce) <0.8 V at
V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2.3 V at
V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All
Ports
Latch-Up Performance Exceeds 250 mA per
JESD 17
I_off Supports Live Insertion, Partial Power-Down
Mode, and Back Drive Protection
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
APPLICATIONS
- Industrial PC: Rugged PC and Laptop
- Access Control and Security: Camera
  Surveillance IP Network
- Vending, Payment and Change Machines
- Patient Monitoring STB / DVR / Streaming Media
  (Withdraw)
- Other Motor Drives (Such as Switch Reluctance)

All other trademarks are the property of their respective owners

The ’LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V V_CC operation.

The ’LV132A devices perform the Boolean function Y = A • B or Y = A + B in positive logic.

Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.

The ’LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V V_CC operation.

The ’LV132A devices perform the Boolean function Y = A • B or Y = A + B in positive logic.

Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.

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