SN74LV1T00-Q1
- AEC-Q100 qualified for automotive applications:
-
Device temperature grade 1: -40°C to +125°C
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Device HBM ESD classification level 2
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Device CDM ESD classification level C4B
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- Wide operating range of 1.8V to 5.5V
- Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
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Up translation:
- 1.2V to 1.8V
- 1.5V to 2.5V
- 1.8V to 3.3V
- 3.3V to 5.0V
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Down translation:
- 5.0V, 3.3V, 2.5V to 1.8V
- 5.0V, 3.3V to 2.5V
- 5.0V to 3.3V
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- 5.5V tolerant input pins
- Supports standard pinouts
- Up to 150Mbps with 5V or 3.3V VCC
- Latch-up performance exceeds 250mAper JESD 17
The SN74LV1T00-Q1 is a 2-input NAND Gate. Each gate performs the Boolean function Y = A × B in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN74LV1T00-Q1 Automotive 2-Input Positive-NAND Gates With Integrated Translation datasheet (Rev. A) | PDF | HTML | 2024年 1月 19日 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組
14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM),設計用途可支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 5 | Ultra Librarian |
SOT-SC70 (DCK) | 5 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點