產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 3.6 BW at Acl (MHz) 104 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 377.5 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.1 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 5 Operating temperature range (°C) -55 to 210 Iout (typ) (mA) 35 2nd harmonic (dBc) 96 3rd harmonic (dBc) 91.5 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 81 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 105 Rating High Temp
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 3.6 BW at Acl (MHz) 104 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 377.5 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.1 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 5 Operating temperature range (°C) -55 to 210 Iout (typ) (mA) 35 2nd harmonic (dBc) 96 3rd harmonic (dBc) 91.5 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 81 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 105 Rating High Temp
CFP (HKJ) 8 38.985 mm² 6.9 x 5.65 CFP (HKQ) 8 38.985 mm² 6.9 x 5.65 DIESALE (KGD) See data sheet SOIC (D) 8 29.4 mm² 4.9 x 6
  • Fully Differential Architecture
  • Bandwidth: 40.7 MHz (210°C)
  • Slew Rate: 353.5 V/µs (210°C)
  • HD2: –96 dBc at 1 kHz
    (1 VRMS, RL = 1 kΩ) (210°C)
  • HD3: –91.5 dBc at 1 kHz
    (1 VRMS, RL = 1 kΩ) (210°C)
  • Input Voltage Noise: 19.95 nV/√Hz (f = 100 kHz)
  • Open-Loop Gain: 90 dB (typ) (210°C)
  • NRI—Negative Rail Input
  • RRO—Rail-to-Rail Output
  • Output Common-Mode Control (with Low Offset and Drift)
  • Power Supply:
    • Voltage: 2.5 V (±1.25 V) to 3.3 V (±1.65 V)
    • Current: 1.4 mA/ch (3.3 V)
  • Power-Down Capability: 10 µA (typ) (210°C)
  • Fully Differential Architecture
  • Bandwidth: 40.7 MHz (210°C)
  • Slew Rate: 353.5 V/µs (210°C)
  • HD2: –96 dBc at 1 kHz
    (1 VRMS, RL = 1 kΩ) (210°C)
  • HD3: –91.5 dBc at 1 kHz
    (1 VRMS, RL = 1 kΩ) (210°C)
  • Input Voltage Noise: 19.95 nV/√Hz (f = 100 kHz)
  • Open-Loop Gain: 90 dB (typ) (210°C)
  • NRI—Negative Rail Input
  • RRO—Rail-to-Rail Output
  • Output Common-Mode Control (with Low Offset and Drift)
  • Power Supply:
    • Voltage: 2.5 V (±1.25 V) to 3.3 V (±1.65 V)
    • Current: 1.4 mA/ch (3.3 V)
  • Power-Down Capability: 10 µA (typ) (210°C)

The THS4521 is a very low-power, fully differential op amp with rail-to-rail output and an input common-mode range that includes the negative rail. This amplifier is designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provides exceptional performance in audio applications.

The THS4521 features accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, this device is ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single 2.5-V to 3.3-V and ground power supply.

The THS4521 is characterized for operation from –55°C to 210°C.

The THS4521 is a very low-power, fully differential op amp with rail-to-rail output and an input common-mode range that includes the negative rail. This amplifier is designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provides exceptional performance in audio applications.

The THS4521 features accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, this device is ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single 2.5-V to 3.3-V and ground power supply.

The THS4521 is characterized for operation from –55°C to 210°C.

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類型 標題 日期
* Data sheet Very-Low Power, Negative Rail Input, Rail-to-Rail Output, Differential Amp datasheet (Rev. D) 2012年 5月 30日
* Radiation & reliability report THS4521HKJ_HKQ Reliability Report 2012年 9月 20日
* Radiation & reliability report THS4521HD Reliability Report (Rev. A) 2012年 8月 17日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
EVM User's guide Harsh Environment Acquisition Terminal (H.E.A.T.) System Evaluation Kit (Rev. D) 2015年 7月 24日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

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THS4521EVM — THS4521 評估模組

The THS4521EVM is an evaluation module for the single, THS4521 in the D (8-lead SOIC) package.

The THS4521EVM is designed to quickly and easily demonstrate the functionality and versatility of the amplifier. The EVM is ready to connect to power, signal source, and test instruments through the use of (...)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
CFP (HKJ) 8 Ultra Librarian
CFP (HKQ) 8 Ultra Librarian
DIESALE (KGD)
SOIC (D) 8 Ultra Librarian

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