現在提供此產品的更新版本

open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
TLV3601 現行 具有推挽輸出的 2.5-ns 高速軌至軌比較器 Improved response time for more accurate high-speed measurement

產品詳細資料

Number of channels 1 Output type Push-Pull Propagation delay time (µs) 0.0045 Vs (max) (V) 5.5 Vs (min) (V) 2.7 Rating Catalog Features Hysteresis, Shutdown Iq per channel (typ) (mA) 3.2 Vos (offset voltage at 25°C) (max) (mV) 6.5 Rail-to-rail In Operating temperature range (°C) -40 to 125 Input bias current (±) (max) (nA) 0.01 VICR (max) (V) 5.7 VICR (min) (V) -0.2
Number of channels 1 Output type Push-Pull Propagation delay time (µs) 0.0045 Vs (max) (V) 5.5 Vs (min) (V) 2.7 Rating Catalog Features Hysteresis, Shutdown Iq per channel (typ) (mA) 3.2 Vos (offset voltage at 25°C) (max) (mV) 6.5 Rail-to-rail In Operating temperature range (°C) -40 to 125 Input bias current (±) (max) (nA) 0.01 VICR (max) (V) 5.7 VICR (min) (V) -0.2
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8
  • High Speed: 4.5 ns
  • Rail-to-Rail I/O
  • Supply Voltage: 2.7 V to 5.5 V
  • Push-Pull CMOS Output Stage
  • Shutdown (TLV3501 Only)
  • Micro Packages: 6-Pin SOT-23 (Single), 8-Pin SOT-23 (Dual)
  • Low Supply Current: 3.2 mA
  • High Speed: 4.5 ns
  • Rail-to-Rail I/O
  • Supply Voltage: 2.7 V to 5.5 V
  • Push-Pull CMOS Output Stage
  • Shutdown (TLV3501 Only)
  • Micro Packages: 6-Pin SOT-23 (Single), 8-Pin SOT-23 (Dual)
  • Low Supply Current: 3.2 mA

The TLV350x family of push-pull output comparators feature a fast 4.5-ns propagation delay and operation from 2.7 V to 5.5 V. Beyond-the-rails input common-mode range makes it an ideal choice for low-voltage applications. The rail-to-rail output directly drives either CMOS or TTL logic.

Microsize packages provide options for portable and space-restricted applications. The single (TLV3501) is available in 6-pin SOT-23 and 8-pin SO packages. The dual (TLV3502) comes in the 8-pin SOT-23 and 8-pin SO packages.

The TLV350x family of push-pull output comparators feature a fast 4.5-ns propagation delay and operation from 2.7 V to 5.5 V. Beyond-the-rails input common-mode range makes it an ideal choice for low-voltage applications. The rail-to-rail output directly drives either CMOS or TTL logic.

Microsize packages provide options for portable and space-restricted applications. The single (TLV3501) is available in 6-pin SOT-23 and 8-pin SO packages. The dual (TLV3502) comes in the 8-pin SOT-23 and 8-pin SO packages.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 6
類型 標題 日期
* Data sheet TLV350x 4.5-ns, Rail-to-Rail, High-Speed Comparator in Microsize Packages datasheet (Rev. E) PDF | HTML 2015年 4月 17日
Application brief Time of Flight and LIDAR - Optical Front End Design (Rev. A) PDF | HTML 2022年 4月 29日
Circuit design Signal and clock recovery comparator circuit (Rev. A) PDF | HTML 2021年 6月 22日
Application note AN-31 Amplifier Circuit Collection (Rev. D) 2020年 10月 21日
Application note High Speed Comparators for Triggering in Oscilloscopes 2018年 2月 19日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
模擬型號

Clock and Data Restoration Circuit

SNOM661.ZIP (240 KB) - TINA-TI Reference Design
模擬型號

TLV3501 and TLV3502 PSpice Model

SBOMBU5.ZIP (92 KB) - PSpice Model
模擬型號

TLV3501 and TLV3502 TINA-TI MACRO and Reference Design

SBOMBU6.ZIP (10 KB) - TINA-TI Reference Design
設計工具

CIRCUIT060072 — 訊號與時鐘恢復比較器電路

訊號復原電路用於數位系統,以擷取扭曲的時脈或資料波形。由於雜散電容、雜散電感或傳輸線路上的反射,這些時脈與數據訊號會在長走線上衰減和失真。比較器用於感測衰減和失真的輸入訊號,並轉換為全刻度數位輸出訊號。動態參考電壓將連接至比較器的反相端子,以從輸入訊號中擷取共模電壓。
設計工具

SBOC552 Simulation for Pulse Width Modulator in AN-31

支援產品和硬體

支援產品和硬體

產品
高速運算放大器 (GBW ≥ 50 MHz)
OPA365 2.2 V、50 MHz、低雜訊、單電源供電軌至軌運算放大器
比較器
TLV3501 具有關機功能的 4.5ns、軌對軌高速比較器
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDA-060025 — 可將 LIDAR 與飛行時間 (ToF) 應用的跨阻抗頻寬最大化的參考設計

This design demonstrates a high-speed optical front-end with a Time of Flight (ToF) distance measurement circuit using a fiber-optic transmission medium, which can be adapted to any type of ToF measurement such as through free space. This design features an industry-leading 2.5-V output linear (...)
Design guide: PDF
電路圖: PDF
參考設計

TIPD105 — 輸入 2 kHz 至 32 MHz 的 AC 耦合比較器參考設計

This reference design provides the theory, component selection, and simulation of a single supply comparator required to use AC coupling to detect sine waves or square waves. Often this is needed due to differences in ground between two different modules. Whenever AC coupling is involved into (...)
使用指南: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
SOT-23 (DBV) 6 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片