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CDCLVC1102

ACTIVE

Low jitter, 1:2 LVCMOS fan-out clock buffer

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Data sheet

CDCLVC1102

ACTIVE
Data sheet Order now

Product details

Function Single-ended Additive RMS jitter (typ) (fs) 70 Output frequency (max) (MHz) 250 Number of outputs 2 Output supply voltage (V) 2.5, 3.3 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 50 Features 1:2 fanout, Output enable control Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS
Function Single-ended Additive RMS jitter (typ) (fs) 70 Output frequency (max) (MHz) 250 Number of outputs 2 Output supply voltage (V) 2.5, 3.3 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 50 Features 1:2 fanout, Output enable control Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS
TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10, 1:12 LVCMOS Clock Buffer Family
  • Very Low Pin-to-Pin Skew < 50 ps
  • Very Low Additive Jitter < 100 fs
  • Supply Voltage: 3.3 V or 2.5 V
  • fmax = 250 MHz for 3.3 V
    fmax = 180 MHz for 2.5 V
  • Operating Temperature Range: –40°C to 85°C
  • Available in 8-, 14-, 16-, 20-, 24-Pin TSSOP Package (All Pin-Compatible)
  • High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10, 1:12 LVCMOS Clock Buffer Family
  • Very Low Pin-to-Pin Skew < 50 ps
  • Very Low Additive Jitter < 100 fs
  • Supply Voltage: 3.3 V or 2.5 V
  • fmax = 250 MHz for 3.3 V
    fmax = 180 MHz for 2.5 V
  • Operating Temperature Range: –40°C to 85°C
  • Available in 8-, 14-, 16-, 20-, 24-Pin TSSOP Package (All Pin-Compatible)

The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.

The entire family is designed with a modular approach in mind. It is intended to round up TI’s series of LVCMOS clock generators.

Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.

The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C to 85°C.

The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.

The entire family is designed with a modular approach in mind. It is intended to round up TI’s series of LVCMOS clock generators.

Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.

The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C to 85°C.

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LMK1C1102 ACTIVE 2-channel output LVCMOS 1.8-V buffer LMK1C1102 is parametrically superior to the CDCLVC1102, more cost-effective than the CDCLVC1102, and has added features, such as synchronous output enable.

Technical documentation

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* Data sheet CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet (Rev. B) PDF | HTML 24 Feb 2017
Application note Sine to Square Wave Conversion Using Clock Buffers PDF | HTML 03 Sep 2024
Application note How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer 30 Nov 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

CDCLVC1104EVM — CDCLVC1104 Evaluation Module

The CDCLVC1104 is a high-performance, low-additive phase noise LVCMOS clock buffer. It has one LVCMOS input and four LVCMOS outputs. It also has an enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVC1104. However, this EVM can also be used (...)
User guide: PDF
Not available on TI.com
Evaluation board

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DLP® LightCrafter Display 4710 EVM-G2 is an easy to use, plug and play evaluation platform for the Full HD DLP4710 chipset. The DLP4710 chipset is designed to be used in a wide array of display applications like mobile projectors, screenless TVs, interactive displays and digital signage. The (...)
User guide: PDF
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Simulation model

CDCLVC1102/03/04/06/08/10/12 IBIS Model (Rev. B)

SLLM088B.ZIP (263 KB) - IBIS Model
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Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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Design tool

PLLATINUMSIM-SW — PLLatinum Sim Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Supported products & hardware

Supported products & hardware

Products
Clock buffers
CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB400 — 4-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB803 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses CDCLVC1102 — Low jitter, 1:2 LVCMOS fan-out clock buffer CDCLVC1103 — Low jitter, 1:3 LVCMOS fan-out clock buffer CDCLVC1104 — Low jitter, 1:4 LVCMOS fan-out clock buffer CDCLVC1106 — Low jitter, 1:6 LVCMOS fan-out clock buffer CDCLVC1108 — Low jitter, 1:8 LVCMOS fan-out clock buffer CDCLVC1110 — Low jitter, 1:10 LVCMOS fan-out clock buffer CDCLVC1112 — Low jitter, 1:12 LVCMOS fan-out clock buffer CDCLVC1310 — Universal input, 10-output low impedance LVCMOS buffer CDCLVD110 — 1-to-10 LVDS clock buffer up to 900-MHz with minimum skew for clock distribution CDCLVD110A — 1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution CDCLVD1204 — Low jitter, 2-input selectable 1:4 universal-to-LVDS buffer CDCLVD1208 — Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer CDCLVD1212 — Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer CDCLVD1213 — Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider CDCLVD1216 — Low jitter, 2-input selectable 1:16 universal-to-LVDS buffer CDCLVD2102 — Low jitter, dual 1:2 universal-to-LVDS buffer CDCLVD2104 — Low jitter, dual 1:4 universal-to-LVDS buffer CDCLVD2106 — Low jitter, dual 1:6 universal-to-LVDS buffer CDCLVD2108 — Low jitter, dual 1:8 universal-to-LVDS buffer CDCLVP110 — 1:10 LVPECL/HSTL to LVPECL clock driver CDCLVP1102 — Low jitter 1:2 universal-to-LVPECL buffer CDCLVP111 — 1:10 LVPECL buffer with selectable input CDCLVP111-EP — HiRel, 1:10 LVPECL buffer with selectable input CDCLVP111-SP — 1:10 high speed clock buffer with selectable input clock driver CDCLVP1204 — Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer CDCLVP1208 — Low jitter, 2-input selectable 1:8 universal-to-LVPECL buffer CDCLVP1212 — Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer CDCLVP1216 — Low jitter, 2-input selectable 1:16 universal-to-LVPECL buffer CDCLVP2102 — Low jitter, dual 1:2 universal-to-LVPECL buffer CDCLVP2104 — Low jitter, dual 1:4 universal-to-LVPECL buffer CDCLVP2106 — Low jitter, dual 1:6 universal-to-LVPECL buffer CDCLVP2108 — Low jitter, dual 1:8 universal-to-LVPECL buffer CDCLVP215 — Dual 1:5 high speed LVPECL fan out buffer LMK00301 — 3-GHz, 10-output differential fanout buffer / level translator LMK00304 — 3.1-GHz differential clock buffer/level translator with 4 configurable outputs LMK00306 — 3.1-GHz differential clock buffer/level translator with 6 configurable outputs LMK00308 — 3.1-GHz differential clock buffer/level translator with 8 configurable outputs LMK00334 — 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00334-Q1 — Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00338 — 8-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK1C1102 — 2-channel output LVCMOS 1.8-V buffer LMK1C1103 — 3-channel output LVCMOS 1.8-V buffer LMK1C1104 — 4-channel output LVCMOS 1.8-V buffer LMK1C1106 — 6-channel output LVCMOS 1.8-V buffer LMK1C1108 — 8-channel output LVCMOS 1.8-V buffer LMK1D1204 — 4-channel output LVDS 1.8-V buffer LMK1D1204P — 4-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer with pin control LMK1D1208 — 8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C LMK1D1208P — 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control LMK1D1212 — 12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D1216 — 16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2102 — Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D2102L — Low additive jitter LVDS buffer LMK1D2104 — Dual bank 4-channel output 1.8V, 2.5V and 3.3V LVDS buffer LMK1D2106 — Dual bank 6-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2106L — Dual bank 2-channel output LVDS 1.8V, 2.5V and 3.3V buffer with 0.7V output common mode option LMK1D2108 — Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
Clock generators
LMK03318 — Ultra-low jitter clock generator family with single PLL LMK03328 — Ultra-low jitter clock generator family with two independent PLLs LMK3C0105 — 5 output reference-less clock generator with bulk acoustic wave (BAW) LMK3H0102 — Bulk acoustic wave (BAW)-based PCIe Gen 1 to Gen 6-compliant referenceless clock generator
Clock jitter cleaners
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Oscillators
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Hardware development
Evaluation board
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Software
Support software
LMX9830-SW — LMX9830 Application Notes, Software, and Tools LMX9838-SW — LMX9838 Application Notes, Software, and Tools
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Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 8 Ultra Librarian
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