SN74HC273

Name: SN74HC273
Brand: TI
SKU: SN74HC273
Price: 0.112 USD

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Achtfach-Flipflops (Typ D) mit Clear

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Datenblatt

document-pdfAcrobat SNx4HC273 Octal D-Type Flip-Flops With Clear datasheet (Rev. F) (Englisch) PDF | HTML

SN74HC273

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Datenblatt

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Produktdetails

Number of channels

8

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

28

IOL (max) (mA)

5.2

IOH (max) (mA)

-5.2

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Number of channels

8

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

28

IOL (max) (mA)

5.2

IOH (max) (mA)

-5.2

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-40 to 85

Rating

Catalog

PDIP (N)

20

228.702 mm² 24.33 x 9.4

SOIC (DW)

20

131.84 mm² 12.8 x 10.3

SOP (NS)

20

98.28 mm² 12.6 x 7.8

SSOP (DB)

20

56.16 mm² 7.2 x 7.8

TSSOP (PW)

20

41.6 mm² 6.5 x 6.4

Wide operating voltage range of 2 V to 6 V
Outputs can drive up to 10 LSTTL loads
Low power consumption, 80-µA maximum I_CC
Typical t_pd = 12 ns
±4-mA output drive at 5 V
Low input current of 1-µA maximum
Contain eight flip-flops with single-rail outputs
Direct clear input
Individual data input to each flip-flop
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

Wide operating voltage range of 2 V to 6 V
Outputs can drive up to 10 LSTTL loads
Low power consumption, 80-µA maximum I_CC
Typical t_pd = 12 ns
±4-mA output drive at 5 V
Low input current of 1-µA maximum
Contain eight flip-flops with single-rail outputs
Direct clear input
Individual data input to each flip-flop
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear ( CLR) input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear ( CLR) input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

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	Typ	Titel		Datum
*	Data sheet	SNx4HC273 Octal D-Type Flip-Flops With Clear datasheet (Rev. F)	PDF \| HTML	21 Apr 2022
	Application note	Power-Up Behavior of Clocked Devices (Rev. B)	PDF \| HTML	15 Dez 2022
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		26 Jul 2021
	Selection guide	Logic Guide (Rev. AB)		12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 Jul 2004
	User guide	Signal Switch Data Book (Rev. A)		14 Nov 2003
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		29 Aug 2002
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		01 Jun 1997
	Application note	Designing With Logic (Rev. C)		01 Jun 1997
	Application note	Input and Output Characteristics of Digital Integrated Circuits		01 Okt 1996
	Application note	Live Insertion		01 Okt 1996
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions		01 Mai 1996
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc		01 Apr 1996

Design und Entwicklung

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Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

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Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
PDIP (N)	20	Ultra Librarian
SOIC (DW)	20	Ultra Librarian
SOP (NS)	20	Ultra Librarian
SSOP (DB)	20	Ultra Librarian
TSSOP (PW)	20	Ultra Librarian

Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

SN74HC273

Achtfach-Flipflops (Typ D) mit Clear

SN74HC273

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