The ADC3664-SP is a low latency, low noise, and ultra low power, 14-bit, 125MSPS, high-speed dual channel ADC. Designed for best noise performance, the device delivers a noise spectral density of –156.9dBFS/Hz combined with excellent linearity and dynamic range. The ADC3664-SP offers DC precision together with IF sampling support to enable the design of a wide range of applications. The low latency architecture (as low as 1 clock cycle latency) and high sample rate also enable high speed control loops. The ADC consumes only 100mW/ch at 125MSPS and the power consumption scales well with sampling rate.
The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device also integrates a digital down converter (DDC) to help reduce the data rate and lower system power consumption. The device is pin-to-pin compatible with the 18-bit, 65MSPS ADC3683-SP. It comes in a 64-pin CFP package (10.9mm x 10.9mm) and supports a temperature range from –55°C to +105°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | ADC3664-SP Radiation-Hardness-Assured 14-Bit, Dual Channel, 1 to 125MSPS, Low Latency, Low Noise, Ultra-low Power, Analog-to-Digital Converter (ADC) datasheet | PDF | HTML | 13 dic 2024 |
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The ADC3664 evaluation module (EVM) demonstrates the performance of the ADC3664, which is an ultra-low-power, high-linearity, analog-to-digital converter (ADC). Onboard voltage regulation and flexible analog input options allow easy evaluation for many different applications.
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El módulo de evaluación ADC3664-SP demuestra cómo evaluar el dispositivo ADC3664-SP.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| CFP (HBP) | 64 | Ultra Librarian |
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