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Búferes y controladores no inversores

SN74ALVCH162344

ACTIVO

Búferes de 8 canales, 1.65 V a 3.6 V con retención de bus y salidas de 3 estados

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SN74ALVCH162344

ACTIVO
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Detalles del producto

Technology family ALVC Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 3.6 Number of channels 8 IOL (max) (mA) 12 Supply current (max) (µA) 40 IOH (max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Damping resistors, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVC Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 3.6 Number of channels 8 IOL (max) (mA) 12 Supply current (max) (µA) 40 IOH (max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Damping resistors, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 56 190.647 mm² 18.42 x 10.35 TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65-V to 3.6-V
  • Max tpd of 4.4 ns at 3.3-V
  • ±12-mA Output Drive at 3.3-V
  • Output Ports Have Equivalent 26- Resistors, So No External Resistors Are Required
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65-V to 3.6-V
  • Max tpd of 4.4 ns at 3.3-V
  • ±12-mA Output Drive at 3.3-V
  • Output Ports Have Equivalent 26- Resistors, So No External Resistors Are Required
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

Widebus is a trademark of Texas Instruments.

This 1-bit to 4-bit address driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162344 is used in applications in which four separate memory locations must be addressed by a single address.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ inputs should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This 1-bit to 4-bit address driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162344 is used in applications in which four separate memory locations must be addressed by a single address.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ inputs should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
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Documentación técnica

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Tipo Título Fecha
* Data sheet SN74ALVCH162344 datasheet (Rev. I) 02 sep 2004
Application note An Overview of Bus-Hold Circuit and the Applications (Rev. B) 17 sep 2018
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
User guide ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B) 01 ago 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 may 2002
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 sep 1999
Application note TI SN74ALVC16835 Component Specification Analysis for PC100 03 ago 1998
Application note Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A) 13 may 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 dic 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 ago 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 may 1996

Diseño y desarrollo

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Modelo de simulación

SN74ALVCH162344 Behavioral SPICE Model

SCEM759.ZIP (7 KB) - PSpice Model
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Modelo de simulación

SN74ALVCH162344 IBIS Model

SCEM193.ZIP (60 KB) - IBIS Model
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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
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Pedidos y calidad

Información incluida:
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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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