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SN74AUCH16244

ACTIVO

Búferes de alta velocidad de 16 canales, 0.8 V a 2.7 V, con retención de bus y salidas de 3 estados

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SN74AUCH16244

ACTIVO
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Detalles del producto

Technology family AUC Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 2.7 Number of channels 16 IOL (max) (mA) 9 Supply current (max) (µA) 20 IOH (max) (mA) -9 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUC Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 2.7 Number of channels 16 IOL (max) (mA) 9 Supply current (max) (µA) 20 IOH (max) (mA) -9 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1 TVSOP (DGV) 48 62.08 mm² 9.7 x 6.4
  • Member of the Texas Instruments Widebus™ Family
  • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub 1-V Operable
  • Max tpd of 1.8 ns at 1.8 V
  • Low Power Consumption, 20-uA Max ICC
  • ±8-mA Output Drive at 1.8 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus™ Family
  • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub 1-V Operable
  • Max tpd of 1.8 ns at 1.8 V
  • Low Power Consumption, 20-uA Max ICC
  • ±8-mA Output Drive at 1.8 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Documentación técnica

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Tipo Título Fecha
* Data sheet SN74AUCH16244 datasheet (Rev. E) 01 nov 2002
Selection guide Little Logic Guide 2018 (Rev. G) 06 jul 2018
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note How to Select Little Logic (Rev. A) 26 jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 jun 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices 21 mar 2003
User guide AUC Data Book, January 2003 (Rev. A) 01 ene 2003
Application note Texas Instruments Little Logic Application Report 01 nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 jun 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 mar 2002
More literature AUC Product Brochure (Rev. A) 18 mar 2002

Diseño y desarrollo

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Modelo de simulación

SN74AUCH16244 Behavioral SPICE Model

SCEM700.ZIP (7 KB) - PSpice Model
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Modelo de simulación

SN74AUCH16244 IBIS Model

SCEM256.ZIP (74 KB) - IBIS Model
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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian
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