Información de empaque
| Encapsulado | Pines TSSOP (PW) | 24 |
| Rango de temperatura de funcionamiento (℃) -40 to 85 |
| Cant. de paquetes | Empresa de transporte 2,000 | LARGE T&R |
Características para SN74LVC8T245
- Control inputs V IH/V IL levels are referenced to V CCA voltage
- V CC isolation feature – if either V CC input is at GND, all are in the high-impedance state
- Fully configurable dual-rail design allows each port to operate over the full 1.65-V to 5.5-V power-supply range
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 100-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Descripción de SN74LVC8T245
The SN74LVC8T245 is an eight bit non-inverting bus transceiver with configurable dual power supply rails that enables bidirectional voltage level translation. The SN74LVC8T245 is optimized to operate with V CCA and V CCB set at 1.65 V to 5.5 V. The A port is designed to track V CCA. V CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track V CCB. V CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
The SN74LVC8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable ( OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess I CC and I CCZ.
This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The V CC isolation feature ensures that if either V CC input is at GND, all outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVC8T245 is designed so that the control pins (DIR and OE) are supplied by V CCA.