AFE58JD18

활성

140mW/Ch 전원, 0.75nV/√Hz 잡음을 지원하는 16채널 초음파 아날로그 프론트 엔드

제품 상세 정보

Device type Receiver Number of input channels 16 Active supply current (typ) (mA) 274 Supply voltage (max) (V) 3.6 Operating temperature range (°C) -40 to 85 Interface type JESD204B, LVDS Features Analog Front End (AFE) Rating Catalog
Device type Receiver Number of input channels 16 Active supply current (typ) (mA) 274 Supply voltage (max) (V) 3.6 Operating temperature range (°C) -40 to 85 Interface type JESD204B, LVDS Features Analog Front End (AFE) Rating Catalog
NFBGA (ZBV) 289 225 mm² 15 x 15
  • 16-Channel, Complete Analog Front-End (AFE):
    • LNA, VCAT, PGA, LPF, ADC, and CW Mixer
  • LNA with Programmable Gain:
    • Gain: 24 dB, 18 dB, and 12 dB
    • Linear Input Range:
      0.25 VPP, 0.5 VPP, and 1 VPP
    • Input-Referred Noise:
      0.63 nV/√Hz, 0.7 nV/√Hz, and 0.9 nV/√Hz
    • Programmable Active Termination
  • Voltage-Controlled Attenuator (VCAT): 40 dB
  • Programmable Gain Amplifier (PGA):
    24 dB and 30 dB
  • Total Signal Chain Gain: 54 dB (max)
  • 3rd-Order, Linear-Phase LPF:
    • 10 MHz, 15 MHz, 20 MHz, 30 MHz, 35 MHz,
      and 50 MHz
  • Analog-to-Digital Converter (ADC):
    • 14-Bit ADC: 75-dBFS SNR at 65 MSPS
    • 12-Bit ADC: 72-dBFS SNR at 80 MSPS
  • LVDS Interface Maximum Speed of 1 Gbps
  • Noise and Power Optimizations (Full-Channel):
    • 140 mW/Ch at 0.75 nV/√Hz, 65 MSPS
    • 91.5 mW/Ch at 1.1 nV/√Hz, 40 MSPS
    • 80 mW/Ch at CW Mode
  • Excellent Device-to-Device Gain Matching:
    • ±0.5 dB (typical) and ±1.1 dB (max)
  • Low Harmonic Distortion
  • Fast and Consistent Overload Recovery
  • Passive Mixer for CWD:
    • Low Close-In Phase Noise:
      –156 dBc/Hz at 1 kHz Off 2.5-MHz Carrier
    • Phase Resolution: λ / 16
    • Supports 16X, 8X, 4X, and 1X CW Clocks
    • CWD High-Pass Filter Rejects Undesired Low-
      Frequency Signals < 1 kHz
  • Digital Features:
    • Digital I/Q Demodulator after ADC:
      • Fractional Decimation Filter M = 1 to
        63 with 0.25X Increment Step
      • Data Throughput Reduction After
        Decimation
      • On-Chip RAM with 32 Preset Profiles
  • 5-Gbps JESD Interface:
    • JESD204B Subclass 0, 1, and 2
    • 2, 4, or 8 Channels per JESD Lane
  • Small Package: 15-mm × 15-mm NFBGA-289
  • 16-Channel, Complete Analog Front-End (AFE):
    • LNA, VCAT, PGA, LPF, ADC, and CW Mixer
  • LNA with Programmable Gain:
    • Gain: 24 dB, 18 dB, and 12 dB
    • Linear Input Range:
      0.25 VPP, 0.5 VPP, and 1 VPP
    • Input-Referred Noise:
      0.63 nV/√Hz, 0.7 nV/√Hz, and 0.9 nV/√Hz
    • Programmable Active Termination
  • Voltage-Controlled Attenuator (VCAT): 40 dB
  • Programmable Gain Amplifier (PGA):
    24 dB and 30 dB
  • Total Signal Chain Gain: 54 dB (max)
  • 3rd-Order, Linear-Phase LPF:
    • 10 MHz, 15 MHz, 20 MHz, 30 MHz, 35 MHz,
      and 50 MHz
  • Analog-to-Digital Converter (ADC):
    • 14-Bit ADC: 75-dBFS SNR at 65 MSPS
    • 12-Bit ADC: 72-dBFS SNR at 80 MSPS
  • LVDS Interface Maximum Speed of 1 Gbps
  • Noise and Power Optimizations (Full-Channel):
    • 140 mW/Ch at 0.75 nV/√Hz, 65 MSPS
    • 91.5 mW/Ch at 1.1 nV/√Hz, 40 MSPS
    • 80 mW/Ch at CW Mode
  • Excellent Device-to-Device Gain Matching:
    • ±0.5 dB (typical) and ±1.1 dB (max)
  • Low Harmonic Distortion
  • Fast and Consistent Overload Recovery
  • Passive Mixer for CWD:
    • Low Close-In Phase Noise:
      –156 dBc/Hz at 1 kHz Off 2.5-MHz Carrier
    • Phase Resolution: λ / 16
    • Supports 16X, 8X, 4X, and 1X CW Clocks
    • CWD High-Pass Filter Rejects Undesired Low-
      Frequency Signals < 1 kHz
  • Digital Features:
    • Digital I/Q Demodulator after ADC:
      • Fractional Decimation Filter M = 1 to
        63 with 0.25X Increment Step
      • Data Throughput Reduction After
        Decimation
      • On-Chip RAM with 32 Preset Profiles
  • 5-Gbps JESD Interface:
    • JESD204B Subclass 0, 1, and 2
    • 2, 4, or 8 Channels per JESD Lane
  • Small Package: 15-mm × 15-mm NFBGA-289

The AFE58JD18 is a highly-integrated, analog front-end (AFE) solutions specifically designed for ultrasound systems where high performance and small size are required.

To request a full datasheet or other design resources: request AFE58JD18

The AFE58JD18 has a total of 16 channels, with each channel consisting of a voltage-controlled amplifier (VCA), a simultaneous sampling 14-bit and 12-bit analog-to-digital converter (ADC), and a continuous wave (CW) mixer. The VCA includes a low-noise amplifier (LNA), a voltage-controlled attenuator (VCAT), a programmable gain amplifier (PGA), and a low-pass filter (LPF). LNA gain is programmable and supports 250-mVPP to 1-VPP input signals and programmable active termination. The ultra-low noise VCAT provides an attenuation control range of 40 dB and improves overall low-gain SNR, which benefits harmonic and near-field imaging. The PGA provides gain options of 24 dB and 30 dB. In front of the ADC, an LPF can be configured at 10 MHz, 15 MHz, 20 MHz, 30 MHz, 35 MHz, or 50 MHz to support ultrasound applications with different frequencies.

The AFE58JD18 also integrates a low-power passive mixer and a low-noise summing amplifier to create an on-chip CWD beamformer. 16 selectable phase delays can be applied to each analog input signal. Furthermore, a unique third- and fifth-order harmonic suppression filter is implemented to enhance CW sensitivity

The high-performance, 14-bit ADC achieves 75-dBFS SNR. This ADC ensures excellent SNR at low-chain gain. The device can operate at maximum speeds of 65 MSPS and 80 MSPS, providing a 14-bit and a 12-bit output, respectively.

The ADC low-voltage differential signaling (LVDS) outputs enable a flexible system integration that is desirable for miniaturized systems.

The AFE58JD18 additionally includes an optional digital demodulator and JESD204B data packing blocks after the 12- or 14-bit ADC. The digital in-phase and quadrature (I/Q) demodulator with programmable fractional decimation filters accelerates computationally-intensive algorithms at low power. A JESD204B interface that runs up to 5 Gbps further reduces the circuit board routing challenges in high-channel count systems.

The AFE58JD18 also allows various power and noise combinations to be selected to optimize system performance. Therefore, the AFE58JD18 is a suitable ultrasound AFE solution for both high-end and portable systems.

The AFE58JD18 is available in a 15-mm × 15-mm NFBGA-289 package (ZBV package, S-PBGA-N289) and is specified for operation from –40°C to 85°C. The device pinout is also similar to the AFE5816 device family.

The AFE58JD18 is a highly-integrated, analog front-end (AFE) solutions specifically designed for ultrasound systems where high performance and small size are required.

To request a full datasheet or other design resources: request AFE58JD18

The AFE58JD18 has a total of 16 channels, with each channel consisting of a voltage-controlled amplifier (VCA), a simultaneous sampling 14-bit and 12-bit analog-to-digital converter (ADC), and a continuous wave (CW) mixer. The VCA includes a low-noise amplifier (LNA), a voltage-controlled attenuator (VCAT), a programmable gain amplifier (PGA), and a low-pass filter (LPF). LNA gain is programmable and supports 250-mVPP to 1-VPP input signals and programmable active termination. The ultra-low noise VCAT provides an attenuation control range of 40 dB and improves overall low-gain SNR, which benefits harmonic and near-field imaging. The PGA provides gain options of 24 dB and 30 dB. In front of the ADC, an LPF can be configured at 10 MHz, 15 MHz, 20 MHz, 30 MHz, 35 MHz, or 50 MHz to support ultrasound applications with different frequencies.

The AFE58JD18 also integrates a low-power passive mixer and a low-noise summing amplifier to create an on-chip CWD beamformer. 16 selectable phase delays can be applied to each analog input signal. Furthermore, a unique third- and fifth-order harmonic suppression filter is implemented to enhance CW sensitivity

The high-performance, 14-bit ADC achieves 75-dBFS SNR. This ADC ensures excellent SNR at low-chain gain. The device can operate at maximum speeds of 65 MSPS and 80 MSPS, providing a 14-bit and a 12-bit output, respectively.

The ADC low-voltage differential signaling (LVDS) outputs enable a flexible system integration that is desirable for miniaturized systems.

The AFE58JD18 additionally includes an optional digital demodulator and JESD204B data packing blocks after the 12- or 14-bit ADC. The digital in-phase and quadrature (I/Q) demodulator with programmable fractional decimation filters accelerates computationally-intensive algorithms at low power. A JESD204B interface that runs up to 5 Gbps further reduces the circuit board routing challenges in high-channel count systems.

The AFE58JD18 also allows various power and noise combinations to be selected to optimize system performance. Therefore, the AFE58JD18 is a suitable ultrasound AFE solution for both high-end and portable systems.

The AFE58JD18 is available in a 15-mm × 15-mm NFBGA-289 package (ZBV package, S-PBGA-N289) and is specified for operation from –40°C to 85°C. The device pinout is also similar to the AFE5816 device family.

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추가 정보 요청

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기술 자료

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3개 모두 보기
유형 직함 날짜
* Data sheet AFE58JD18 16-Channel, Ultrasound AFE with 14-Bit, 65-MSPS or 12-Bit, 80-MSPS ADC, Passive CW Mixer, I/Q Demodulator, and LVDS, JESD204B Outputs datasheet (Rev. A) PDF | HTML 2016/05/27
Application note Understanding CW Mode for Ultrasound AFE Devices 2017/07/17
Application note Time Gain Control (Compensation) in Ultrasound Applications 2016/12/02

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

AFE58JD18EVM — AFE58JD18 평가 모듈

<p>AFE58JD18 평가 모듈(EVM)은 뛰어난 성능과 작은 크기가 필요한 초음파 시스템을 위해 특별히 설계된 고집적 아날로그 프론트 엔드(AFE) 솔루션입니다. AFE58JD18EVM은 완전한 타임 게인 제어(TGC) 영상 경로와 연속파 도플러(CWD) 경로를 통합하였습니다. 또한, 시스템 성능을 최적화하기 위해 다양한 전원/잡음 조합 중 하나를 선택할 수 있는 기능이 포함되어 있습니다. 따라서 AFE58JD18EVM은 하이엔드 시스템뿐 아니라 휴대용 시스템에도 적합한 초음파 AFE 솔루션입니다.</p>

사용 설명서: PDF
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NFBGA (ZBV) 289 Ultra Librarian

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