홈 스위치 및 멀티플렉서 아날로그 스위치 및 멀티플렉서
홈
스위치 및 멀티플렉서
아날로그 스위치 및 멀티플렉서

SN74CBTLV3257

활성

부분 전원 차단 모드를 지원하는 3.3V, 2:1(SPDT), 4채널 아날로그 스위치

지금 주문
데이터 시트

SN74CBTLV3257

활성
데이터 시트 지금 주문

제품 상세 정보

Configuration 2:1 SPDT Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 2:1 SPDT Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SOIC (D) 16 59.4 mm² 9.9 x 6 SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 UQFN (RSV) 16 4.68 mm² 2.6 x 1.8 VQFN (RGY) 16 14 mm² 4 x 3.5
  • 5-Ω Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
  • 5-Ω Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

The SN74CBTLV3257 device is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV3257 device is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
filter 기타 아날로그 스위치 및 멀티플렉서 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치보다 업그레이드된 기능을 지원하는 즉각적 대체품
TMUX1574 활성 전원 차단 보호 및 1.8V 입력 로직을 지원하는 5V, 2:1(SPDT), 4채널 아날로그 스위치 Upgraded 2-GHz bandwidth, 2-Ω RON, and 1.8-V logic support
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
TMUX1575 활성 1.2V 로직을 지원하는 낮은 커패시턴스, 2:1(SPDT) 4채널, 전원 차단 보호 스위치 This product is in a 60% smaller WCSP package, operates at 1.8-GHz bandwidth and supports 1.2-V logic.

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
20개 모두 보기
유형 직함 날짜
* Data sheet SN74CBTLV3257 Low-Voltage 4-Bit 1-of-2 FET Multiplexer/Demultiplexer datasheet (Rev. M) PDF | HTML 2018/07/24
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024/04/30
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022/06/02
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021/12/01
Application brief Enabling SPI-Based Flash Memory Expansion by Using Multiplexers (Rev. B) PDF | HTML 2021/10/07
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021/01/06
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note How to Select Little Logic (Rev. A) 2016/07/26
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
More literature Digital Bus Switch Selection Guide (Rev. A) 2004/11/10
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004/11/04
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Bus FET Switch Solutions for Live Insertion Applications 2003/02/07
Application note Texas Instruments Little Logic Application Report 2002/11/01
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002/06/13
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) 1998/12/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

DLPDLCR4710EVM-G2 — 풀 HD DLP4710 칩셋 평가 모듈

DLP® LightCrafter Display 4710 EVM-G2 is an easy to use, plug and play evaluation platform for the Full HD DLP4710 chipset. The DLP4710 chipset is designed to be used in a wide array of display applications like mobile projectors, screenless TVs, interactive displays and digital signage. The (...)
사용 설명서: PDF
View Options
평가 보드

EVMX777BG-01-00-00 — J6Entry, RSP 및 TDA2E-17 CPU 보드 평가 모듈

J6Entry, RSP and TDA2E-17 CPU Board EVM is an evaluation platform designed to speed up development efforts and reduce time to market for Infotainment  reconfigurable Digital Cluster or Integrated Digital Cockpit and ADAS applications. The CPU board integrates key peripherals such as parallel (...)
파트너 사이트 방문
평가 보드

EVMX777G-01-20-00 — J6Entry/RSP 인포테인먼트(CPU + 디스플레이 + JAMR3) 평가 모듈

The J6Entry/RSP EVM is an evaluation platform designed to speed up development efforts and reduce time to market for applications such as Infotainment, reconfigurable Digital Cluster or Integrated Digital Cockpit.

The main CPU board integrates these key peripherals such as Ethernet or HDMI, while (...)

파트너 사이트 방문
평가 보드

PP-SALB2-EVM — PP-SALB2-EVM 스마트 증폭기 스피커 특성화 보드 평가 모듈(학습 보드 2)

This board supports: TAS2555YZEVM, TAS2557EVM and TAS2559EVM.

The Smart Amplifier Speaker Characterization Board, when used in conjunction with a supported TI Smart Amplifier and PurePath Console software, provides users the ability to measure speaker excursion, temperature and other parameters for (...)

사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

TMDSCSK388 — DM38x 카메라 스타터 키트(CSK)

The DM38x Camera Starter Kit (CSK) enables developers to begin designing wireless or wired connected digital video applications, such as security cameras, car DVRs, endoscopes, action-wearable cameras, drones, video doorbells, baby monitors, and other connected video products.

The DM38x (...)

사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

TMDXEVM368 — TMS320DM36x 평가 모듈

The TMS320DM36x Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of TI’s Digital Media (DMx) processors and begin building digital video applications such as IP security cameras, action cameras, drones, wearables, digital signage, video doorbells, and (...)

사용 설명서: PDF
TI.com에서 구매 불가
인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

사용 설명서: PDF
TI.com에서 구매 불가
인터페이스 어댑터

LEADLESS-ADAPTER1 — TI의 6, 8, 10, 12, 14, 16 및 20핀 리드 없는 패키지의 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

HSPICE Model for SN74CBTLV3257

SCDM133.ZIP (180 KB) - HSpice Model
다운로드
시뮬레이션 모델

SN74CBTLV3257 IBIS Model (Rev. A)

SCDM013A.ZIP (25 KB) - IBIS Model
다운로드
레퍼런스 디자인

TIDA-00179 — 절대 위치 인코더에 대한 범용 디지털 인터페이스 레퍼런스 디자인

TIDA-00179 is an EMC-compliant universal digital interface to connect to absolute position encoders like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. This reference design supports a wide-input voltage range from 15 V to 60 V (24-V nom). A connector with 3.3-V logic I/O signals allows for (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDEP0057 — PRU-ICSS 기반 AM437x를 지원하는 다중 프로토콜 디지털 위치 인코더 마스터 인터페이스 레퍼런스 디자인

This is a reference design for industrial communication on Sitara™ processors with programmable real-time unit and industrial communication subsystem (PRU-ICSS). This design describes the integrated multi-protocol digital position encoder master interface support. The supported digital (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01021 — DSO, 레이더 및 5G 무선 테스터용 멀티 채널 JESD204B 15GHz 클로킹 레퍼런스 디자인

High speed multi-channel applications require precise clocking solutions capable of managing channel-to-channel skew in order to achieve optimal system SNR, SFDR, and ENOB. This reference design is capable of supporting two high speed channels on separate boards by utilizing TI’s LMX2594 (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01023 — 레이더 및 5G 무선 테스터용 다채널 JESD204B 데이지 체인 클록 생성 레퍼런스 설계

High-speed multi-channel applications require low noise and scalable clocking solutions capable of precise channel-to-channel skew adjustment to achieve optimal system SNR, SFDR, and ENOB. This reference design supports high channel count JESD204B synchronized clocks using one master and multiple (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01024 — 레이더 및 5G 무선 테스터용 다채널 JESD204B 데이지 체인 클록 레퍼런스 설계

High-speed multi-channel applications require low noise and scalable clocking solutions capable of precise channel-to-channel skew adjustment to achieve optimal system SNR, SFDR, and ENOB. This reference design supports scaling up JESD204B synchronized clocks in daisy chain configuration. This (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDEP0054 — 변전소 자동화를 위한 병렬 중복 프로토콜(PRP) 이더넷 레퍼런스 설계

This is a reference design for high-reliability, low-latency network communications for substation automation equipment in smart grid transmission and distribution networks. It supports the parallel redundancy protocol (PRP) specification in the IEC 62439 standard using the PRU-ICSS. This reference (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDEP-01017 — Jacinto™ ADAS 프로세서를 사용한 계단식 이미징 레이더 캡처 레퍼런스 설계

This reference design provides a processing foundation for a cascaded imaging radar system. Cascade radar devices can support front, long-range (LRR) beam-forming applications as well as corner- and side-cascade radar and sensor fusion systems. This reference design provides qualified developers (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01226 — DLP Pico 기술을 사용하는 초소형 풀HD 1080p(최대 16개 증폭기) 프로젝션 디스플레이 레퍼런스 디자인

This reference design, featuring the DLP Pico™ 0.47-inch TRP Full-HD 1080p display chipset and implemented in the DLP LightCrafter Display 4710 G2 evaluation module (EVM), enables use of full HD resolution for projection display applications such as accessory projectors, screenless displays, (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDEP0043 — Acontis EtherCAT 마스터 스택 레퍼런스 디자인

The acontis EC-Master EtherCAT Master stack is a highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performance TI Sitara MPUs,  it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT (...)
Design guide: PDF
회로도: PDF
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 16 Ultra Librarian
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
UQFN (RSV) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상