驅動程式或資料庫
AFE79XX-HSC-DESIGN — AFE79xx family high-speed transceiver design & support files
Find detailed product information on the AFE79xx product family (datasheets, EVM resources, software and firmware, reference designs, etc)
產品規格表
AFE7903
- Request full data sheet
- Dual RF sampling 12 GSPS transmit DACs
- Dual RF sampling 3 GSPS receive ADCs
- Maximum signal bandwidth per TX or RX: 400 MHz
- RF frequency range: 5 MHz - 7.4 GHz
- Digital step attenuators (DSA):
- TX: 40 dB range, 0.125 dB steps
- RX: 25 dB range, 0.5 dB steps
- Single or dual-band DUC/DDCs for TX and RX
- 16x NCOs per TX/RX
- Optional Internal PLL/VCO for DAC/ADC clocks or external clock at DAC or ADC sample rate
- Sysref Alignment Detector
- SerDes data interface:
- JESD204B and JESD204C compatible
- 8 SerDes transceivers up to 29.5 Gbps
- Subclass 1 multi-device synchronization
- Package: 17 mm × 17 mm FCBGA, 0.8-mm pitch
The AFE7903 is a high performance, wide bandwidth multi-channel transceiver, integrating two RF sampling transmitter chains and two RF sampling receiver chains. With operation up to 7.4 GHz, this device enables direct RF sampling in the HF, VHF, UHF, L, S and C-band frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems.
The TX signal paths support interpolation and digital up conversion options that deliver up to 400 MHz of signal bandwidth. The output of the DUCs drives a 12 GSPS DAC (digital to analog converter) with a mixed mode output option to enhance 2nd Nyquist operation. The DAC output includes a variable gain amplifier (TX DSA) with 40 dB range and 1 dB analog and 0.125 dB digital steps.
space
Each receiver chain includes a 25 dB range DSA (Digital Step Attenuator), followed by a 3 GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 400 MHz for two RX.
The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock.
技術文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 2 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | AFE7903 2T2R 5-MHz to 7.4-GHz RF Sampling AFE with 12-GSPS DACs and 3-GSPS ADCs, 400-MHz IBW datasheet (Rev. B) | PDF | HTML | 2023年 6月 5日 |
| User guide | AFE79xx SPI Bringup Guide With Xilinx FPGAs (Rev. A) | PDF | HTML | 2024年 5月 5日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
AFE7900EVM — 適用於四傳輸、六接收、5MHz 至 7400MHz、射頻取樣 AFE 的 AFE7900 評估模組
AFE7900 評估模組 (EVM) 是射頻取樣收發器平台，可配置為支援最多同時四個發射與兩個回饋 (4T4R+2FB) 通道。
該模組會評估 AFE7900，此為配備 14 位元 12GSPS 數位轉類比轉換器 (DAC)、14 位元 3GSPS 類比轉數位轉換器 (ADC)，以及適用於 DAC 和 ADC 高頻率時脈產生的晶片內建整合式相鎖迴路/電壓控制振盪器 (PLL/VCO) 之四通道射頻取樣類比前端 (AFE)。
AFE7900EVM 可選擇在每個通道中使用雙數位上變頻器和下變頻器，以同時合成及數位化具有高動態範圍的多個寬頻訊號。支援接收器通道的晶片內建整合式數位步進衰減器 (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| FCBGA (ABJ) | 400 | Ultra Librarian |
| FCBGA (ALK) | 400 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。