THS6232

現行

具有共模緩衝器的差動寬頻 PLC 和 HPLC 線路驅動器

產品詳細資料

Number of channels 1 Architecture PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 40 BW at Acl (MHz) 75 Acl, min spec gain (V/V) 5 Vn at flatband (typ) (nV√Hz) 5 Vn at 1 kHz (typ) (nV√Hz) 15.75 Iq per channel (typ) (mA) 25 Vos (offset voltage at 25°C) (max) (mV) 7 Rail-to-rail No Features Adj Bias, Shutdown Rating Catalog Operating temperature range (°C) -40 to 125 CMRR (typ) (dB) 80 Input bias current (max) (pA) 3000000 Offset drift (typ) (µV/°C) 18 GBW (typ) (MHz) 50 Iout (typ) (mA) 310 2nd harmonic (dBc) 88 3rd harmonic (dBc) 99 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 1 Architecture PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 40 BW at Acl (MHz) 75 Acl, min spec gain (V/V) 5 Vn at flatband (typ) (nV√Hz) 5 Vn at 1 kHz (typ) (nV√Hz) 15.75 Iq per channel (typ) (mA) 25 Vos (offset voltage at 25°C) (max) (mV) 7 Rail-to-rail No Features Adj Bias, Shutdown Rating Catalog Operating temperature range (°C) -40 to 125 CMRR (typ) (dB) 80 Input bias current (max) (pA) 3000000 Offset drift (typ) (µV/°C) 18 GBW (typ) (MHz) 50 Iout (typ) (mA) 310 2nd harmonic (dBc) 88 3rd harmonic (dBc) 99 Frequency of harmonic distortion measurement (MHz) 1
VQFN (RHF) 24 20 mm² 5 x 4
  • Supply range (VS): 7V to 40V
  • Small-signal bandwidth: 75MHz (VO = 2VPP, G = 5)
  • Adjustable power modes:
    • Full-bias mode: 25mA
    • Mid-bias mode: 19.5mA
    • Low-bias mode: 15mA
    • Ultra-low-bias mode: 10mA
    • Low-power-shutdown mode
    • IADJ pin for variable bias
  • SGCC HPLC out-of-band suppression: >30dBc
    • Band0: 49dBc
    • Band1: 61dBc
    • Band2: 64dBc
    • Band3: 65dBc
  • High output current: 800mA (VS = 40V, 1Ω load)
  • Low distortion (VS = 12V, 50Ω load):
    • HD2 (at 1MHz): –88dBc
    • HD3 (at 1MHz): –99dBc
  • Wide output swing (VS = 12V):
    • 21VPP (100Ω load), 19VPP (50Ω load)
  • Integrated midsupply common-mode buffer
  • Integrated overtemperature protection
  • Pin-compatible with THS6212 and THS6222 in 24‑pin VQFN
  • Supply range (VS): 7V to 40V
  • Small-signal bandwidth: 75MHz (VO = 2VPP, G = 5)
  • Adjustable power modes:
    • Full-bias mode: 25mA
    • Mid-bias mode: 19.5mA
    • Low-bias mode: 15mA
    • Ultra-low-bias mode: 10mA
    • Low-power-shutdown mode
    • IADJ pin for variable bias
  • SGCC HPLC out-of-band suppression: >30dBc
    • Band0: 49dBc
    • Band1: 61dBc
    • Band2: 64dBc
    • Band3: 65dBc
  • High output current: 800mA (VS = 40V, 1Ω load)
  • Low distortion (VS = 12V, 50Ω load):
    • HD2 (at 1MHz): –88dBc
    • HD3 (at 1MHz): –99dBc
  • Wide output swing (VS = 12V):
    • 21VPP (100Ω load), 19VPP (50Ω load)
  • Integrated midsupply common-mode buffer
  • Integrated overtemperature protection
  • Pin-compatible with THS6212 and THS6222 in 24‑pin VQFN

The THS6232 is a differential line-driver amplifier with current-feedback architecture, and provides high output current with low distortion performance. The device is targeted for use in broadband, high-speed, power-line communications (HPLC) line-driver applications that require high linearity when driving heavy line loads.

The unique architecture of the THS6232 uses minimal quiescent current while achieving very high linearity. The amplifier has an adjustable current pin (IADJ) that sets the nominal current consumption, along with the multiple bias modes that allow for enhanced power savings where the full performance of the amplifier is not required. Shutdown bias mode provides further power savings during receive mode in time division multiplexed (TDM) systems while maintaining high output impedance. The integrated midsupply common-mode buffer eliminates external components, reducing system cost and board space.

The wide output swing of 21VPP (100Ω load) with 12V power supplies, coupled with over 550mA of current drive, allows for wide dynamic range with minimal distortion.

The THS6232 is available in 24-pin VQFN package with exposed thermal pad, and is specified for operation from –40°C to +125°C.

The THS6232 is a differential line-driver amplifier with current-feedback architecture, and provides high output current with low distortion performance. The device is targeted for use in broadband, high-speed, power-line communications (HPLC) line-driver applications that require high linearity when driving heavy line loads.

The unique architecture of the THS6232 uses minimal quiescent current while achieving very high linearity. The amplifier has an adjustable current pin (IADJ) that sets the nominal current consumption, along with the multiple bias modes that allow for enhanced power savings where the full performance of the amplifier is not required. Shutdown bias mode provides further power savings during receive mode in time division multiplexed (TDM) systems while maintaining high output impedance. The integrated midsupply common-mode buffer eliminates external components, reducing system cost and board space.

The wide output swing of 21VPP (100Ω load) with 12V power supplies, coupled with over 550mA of current drive, allows for wide dynamic range with minimal distortion.

The THS6232 is available in 24-pin VQFN package with exposed thermal pad, and is specified for operation from –40°C to +125°C.

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* Data sheet THS6232 7V-to-40V, Differential HPLC Line Driver With Common-Mode Buffer datasheet PDF | HTML 2024年 6月 18日
Design guide Solar Power Line Communication Reference Design (Rev. B) PDF | HTML 2024年 11月 21日
Application brief LiFi: TI High-Speed Products for Optical Wireless Communication PDF | HTML 2023年 8月 7日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

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THS6232RHFEVM — THS6232 評估模組

THS6232 評估模組 (EVM) 可快速且輕鬆展示放大器的功能性和多元用途。EVM 隨時可透過板載連接器來連接電源、訊號源和測試儀器。EVM 已配置為可透過其輸入與輸出,輕鬆連接常見的 50Ω 實驗室設備。放大器已針對差動輸入進行配置,且差動輸出的增益為 10 V/V。電路板包含跨接器,可在不同偏壓模式之間輕鬆切換裝置,並且具有電位計以設定 IADJ 針腳的值。EVM 可以輕鬆針對其他增益及單一或分離電源運作進行配置。輸出變壓器和電阻器可配置為呈現 50Ω 單端輸出。

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THS6232 TINA-TI Model

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